Interrupt-Responsive Non-Volatile Memory Bank Switching

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Solution Overview

Problem

Existing non-volatile memory systems, such as flash memory, face delays and potential loss of interrupts during programming or erase operations, as these operations lock out the entire memory, leading to delayed response times and inefficiencies, especially in real-time embedded applications.

Innovation Solution

A memory system that allows for interrupt-responsive operation using a single non-volatile memory by aborting the current memory routine upon an interrupt, setting a command failed flag, executing an interrupt service routine, and recovering the aborted routine upon completion, thereby enabling immediate interrupt servicing without requiring a second memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a single non-volatile memory is used, then cost and die area are reduced, but interrupt response time deteriorates due to memory lockout during program/erase operations

Engineering Contradiction:
Improvedie areaVSAvoidinterrupt response time
Core Design Contradiction:
Area of stationary objectVSLoss of time

Solution Approach 1:

The memory space is segmented into multiple banks (first bank and second bank), allowing independent access to different memory regions. When one bank is locked for program/erase operations, the other bank remains accessible for interrupt service routines, thereby maintaining interrupt response time while using a single memory device.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A memory management unit acts as an intermediary between the processor and the memory banks, directing interrupt service routines to the accessible bank while allowing program/erase operations to proceed in the locked bank. This mediator enables simultaneous operations without conflict.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Loss of time

If a second non-volatile memory is provided for interrupt service routines, then interrupt response time is improved, but die area and cost increase

Engineering Contradiction:
Improveinterrupt response timeVSAvoiddie area
Core Design Contradiction:
Loss of timeVSArea of stationary object

Solution Approach 1:

The single non-volatile memory device performs multiple functions through bank switching: it serves both as the main program/erase memory and as the interrupt service routine memory. The memory management unit dynamically assigns banks based on operational needs, making the single memory universally functional for both purposes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The functionality of what would traditionally require two separate memory devices is merged into a single memory device with multiple banks. The first bank and second bank work together to provide both main memory and interrupt memory functionality, reducing die area and cost while maintaining performance.

Inventive Principle:
Principle #5Merging (Combining)

3Loss of time

If SRAM is used for interrupt service routines, then interrupt response time is improved, but power consumption and cell size increase significantly

Engineering Contradiction:
Improveinterrupt response timeVSAvoidpower consumption
Core Design Contradiction:
Loss of timeVSUse of energy by moving object

Solution Approach 1:

The system changes the operational parameters of the non-volatile memory by switching between different banks and operational modes. Instead of using SRAM with its high power consumption, the system uses the same non-volatile memory technology but operates it in different configurations (reading from one bank while allowing program/erase in another), maintaining low power consumption while achieving fast interrupt response.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS7930589B2Interrupt-responsive non-volatile memory system and method
Publication Date: 2011.04.19 ANALOG DEVICES INC
  • US7930589B2 patent drawing
  • US7930589B2 patent drawing
  • US7930589B2 patent drawing

AI summary

An interrupt-responsive non-volatile memory respond to an interrupt by aborting execution by a memory controller of a memory routine in a non-volatile memory, sets, a flag and executes an interrupt service routine; and upon completion of the interrupt service routine, in response to the flag, recovers the execution of the aborted memory routine.