NVRAM Buffer and Dual Controller Architecture for Storage Latency

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Solution Overview

Problem

Traditional storage systems face inefficiencies in data management and transfer processes, particularly in handling data across multiple storage nodes and networks, leading to increased latency and reduced reliability.

Innovation Solution

The implementation of a storage system architecture that utilizes non-volatile random access memory (NVRAM) as a buffer for data destined to be written to storage drives, along with dual storage array controllers for failover and redundancy, and erasure coding for data protection, enables faster write operations and improved data management across multiple storage nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional storage systems write data directly to storage drives, then data reliability is maintained, but write operation latency increases

Engineering Contradiction:
Improvewrite operation speedVSAvoiddata reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent introduces NVRAM as an intermediary buffer between the host system and storage drives. Write requests are first directed to the NVRAM buffer where they can be quickly acknowledged, while the actual data transfer to storage drives occurs asynchronously in the background. This mediator approach resolves the contradiction by decoupling the write acknowledgment speed from the physical write speed to drives.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary actions by pre-allocating buffer space in NVRAM and pre-establishing data transfer pathways before actual write operations occur. The dual controller architecture is also configured in advance with redundant pathways, enabling failover capability to be ready before needed, thus improving write speed without compromising reliability.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If traditional storage systems use single controller architecture, then device complexity is reduced, but system availability decreases

Engineering Contradiction:
Improvesystem availabilityVSAvoidcontroller architecture complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the functionality of multiple controllers into a unified dual-controller architecture that shares common resources such as back-end storage connections and management logic. This consolidation approach reduces overall system complexity while maintaining the availability benefits of having redundant controllers, as the controllers can work together efficiently and failover seamlessly.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system implements local quality by assigning specific roles and responsibilities to each controller in the dual architecture. Each controller manages specific storage arrays or communication channels independently, allowing localized failures to be contained and handled without affecting the entire system. This differentiation enables simplified individual controller designs while achieving high overall availability.

Inventive Principle:
Principle #3Local quality

3Loss of time

If storage systems transfer data directly between storage nodes, then transfer efficiency is maintained, but network latency increases

Engineering Contradiction:
Improvedata transfer latencyVSAvoiddata transfer efficiency
Core Design Contradiction:
Loss of timeVSProductivity

Solution Approach 1:

The patent employs NVRAM buffers at storage nodes as intermediaries for data transfers. Instead of direct node-to-node transfers that require network communication, data can be staged in local NVRAM buffers and transferred more efficiently. The buffer architecture mediates between different storage nodes, reducing network round-trip latency while maintaining transfer throughput through optimized buffer management.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11768623B2Optimizing generalized transfers between storage systems
Publication Date: 2023.09.26 PURE STORAGE INC
  • US11768623B2 patent drawing
  • US11768623B2 patent drawing
  • US11768623B2 patent drawing

AI summary

Optimizing generalized transfers between storage systems including identifying, by a first storage system, a request to transfer source data from the first storage system to a second storage system, wherein the first storage system implements a first storage architecture and the second storage system implements a second storage architecture; identifying difference information between the source data that is stored on the first storage system using the first storage architecture and existing data that is stored on the second storage system using the second storage architecture; and transferring, in dependence upon the difference information, a subset of the source data from the first storage system to the second storage system.