NVRAM Buffer Storage Architecture for Low Latency Data Persistence

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Solution Overview

Problem

Traditional storage systems face inefficiencies in data management and reliability due to unnecessary write operations and lack of centralized control, leading to increased latency and potential data loss during power failures.

Innovation Solution

A storage system architecture that utilizes non-volatile random access memory (NVRAM) as a buffer for data destined to be written to storage drives, with a storage array controller managing control information and offloading device management responsibilities, and implementing dual storage array controllers for failover and redundancy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is written directly to storage drives, then data persistence is achieved, but write latency increases and unnecessary write operations occur

Engineering Contradiction:
Improvedata persistenceVSAvoidwrite latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary writing of data to NVRAM buffer before final writing to storage drives. The NVRAM buffer temporarily holds data that has been written from the host, allowing the system to acknowledge writes quickly while maintaining data persistence through subsequent background writes to slower storage media.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

NVRAM buffer acts as an intermediary between the host and storage drives. It decouples the host's write operations from the actual physical writing to storage drives, allowing the host to continue operations without waiting for slow disk writes while ensuring data is eventually persisted to reliable storage media.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If storage array controller manages all control information, then centralized control is achieved, but device complexity increases

Engineering Contradiction:
Improvecentralized controlVSAvoidcontroller complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The storage system is segmented into multiple independent storage array controllers, each managing its own set of storage devices. This segmentation distributes the control complexity across multiple smaller units while maintaining centralized management at the system level through the host interface.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The host computer acts as an intermediary that manages data placement and distribution across multiple storage array controllers. This allows centralized control logic to reside in the host rather than being distributed across all controllers, simplifying individual controller design while maintaining system-wide centralized management.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If single storage array controller is used, then device complexity is reduced, but reliability decreases during power failures

Engineering Contradiction:
Improvecontroller countVSAvoidfailover capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Each storage array controller is designed with independent local quality features including its own NVRAM buffer and control logic. This allows each controller to autonomously handle failures and continue serving its assigned storage devices, providing local redundancy that enhances overall system reliability without requiring a single complex centralized controller.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The system changes the parameter of controller redundancy from zero to one or more backup controllers. When a primary controller fails, a backup controller with identical functionality takes over, maintaining system operation. This parameter change from single to multiple controllers provides failover capability while keeping individual controller complexity manageable.

Inventive Principle:
Principle #35Parameter changes

4Loss of time

If NVRAM buffer is implemented, then write latency is reduced, but data loss risk increases during power failures

Engineering Contradiction:
Improvewrite latencyVSAvoiddata integrity
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The NVRAM buffer provides beforehand cushioning by temporarily storing written data in a non-volatile medium that preserves data during power failures. This cushioning layer protects against data loss by maintaining data integrity during power interruptions, allowing the system to recover and complete writes to storage drives after power is restored.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The NVRAM buffer enables continuity of useful action by maintaining data during power failures and allowing write operations to resume after power restoration. The buffer ensures that write operations continue effectively without interruption, preserving both the speed advantage of NVRAM and the data integrity required for reliable storage.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS20240193304A1Network Restrictions For Secure Sharing Of Cloud Storage Data
Publication Date: 2024.06.13 PURE STORAGE INC
  • US20240193304A1 patent drawing
  • US20240193304A1 patent drawing
  • US20240193304A1 patent drawing

AI summary

Secure sharing of data subsets within a cloud environment, including: receiving, from a requestor, a request to access a dataset that is stored within a cloud-based storage system; identifying one or more characteristics associated with the requestor, identifying one or more characteristics associated with the dataset; and providing the requestor with at least a portion of the dataset, wherein the portion of the dataset that is provided to the requestor is selected in dependence upon the one or more characteristics associated with the requestor and the one or more characteristics associated with the dataset.