NVRAM Cache ECC Storage in NAND Flash for Fast Reliable Access

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Solution Overview

Problem

The reliability of non-volatile memory systems, particularly those using NVRAM as cache memory, deteriorates with increased rewrite operations, and existing solutions that apply error correction codes (ECCs) to improve data holding characteristics often result in decreased access speed, affecting the overall system performance.

Innovation Solution

A memory system architecture where error correction codes are applied to data stored in NVRAM using ECCs held in a separate NAND-type flash memory, allowing bit-error detection and correction without storing ECCs in the NVRAM, thus maintaining high access speed and improving data holding characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction codes (ECCs) are applied to data stored in NVRAM to improve data holding characteristics, then reliability is improved, but access speed decreases due to the overhead of ECC operations

Engineering Contradiction:
Improvedata holding characteristicVSAvoidaccess speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent segments the error correction functionality by separating ECC storage from NVRAM data storage. ECCs are stored in NAND-type flash memory while NVRAM stores only data, allowing independent optimization of each component's access patterns and avoiding ECC operation overhead on NVRAM access speed

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control section acts as an intermediary that manages the interaction between NVRAM and NAND-type flash memory. It handles ECC generation, storage, and verification operations, coordinating data flows between the two memory types to maintain system performance while enabling error correction

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If ECCs are stored in NVRAM to protect data, then data holding characteristic is improved, but the cost increases due to reduced usable storage capacity

Engineering Contradiction:
Improvedata holding characteristicVSAvoidcost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent extracts the ECC storage function from NVRAM and places it in NAND-type flash memory. This extraction allows NVRAM to provide full usable storage capacity for data while ECCs are maintained separately in the lower-cost NAND flash, eliminating the cost penalty of reduced NVRAM capacity

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses lower-cost NAND-type flash memory for storing ECCs instead of expensive NVRAM. Since ECCs are relatively small in size compared to data, storing them in cheaper memory significantly reduces overall system cost while maintaining the same reliability benefits

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS8775905B2Memory system and operation method thereof
Publication Date: 2014.07.08 SONY GROUP CORP
  • US8775905B2 patent drawing
  • US8775905B2 patent drawing
  • US8775905B2 patent drawing

AI summary

A memory system includes: a first non-volatile memory used for storing data to be accessed in block units; a second non-volatile memory used for storing data to be accessed in word units in random accesses to the second non-volatile memory; and a control section configured to control operations of the first and second non-volatile memories, wherein error correction codes to be applied to data stored in the second non-volatile memory are held in the first non-volatile memory.