NVRAM Error Correction via Volatile RAM Copying
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Solution Overview
Problem
Current information handling systems lack the ability to detect and correct corrupted non-volatile random access memory (NVRAM) data, which can lead to system failures due to permanent damage from excessive write/erase cycles, without increasing the bill of materials cost or altering the NVRAM format.
Innovation Solution
Implementing a system that uses Error Correcting Code (ECC) data stored in volatile RAM to detect and correct NVRAM errors, reducing the need for additional storage and maintaining the existing NVRAM format, by writing ECC data only during low power state transitions and using it to update NVRAM when necessary.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Error Correcting Code (ECC) data is stored in volatile RAM and used to correct NVRAM errors, then system reliability is improved, but the system requires additional volatile memory resources
Solution Approach 1:
The patent creates a copy of the NVRAM data in volatile RAM, generates ECC data from this copy, and uses the ECC data to detect and correct errors in the original NVRAM data. This copying approach allows error correction without permanently storing redundant data in NVRAM, thus improving reliability while minimizing additional storage requirements.
Solution Approach 2:
The system performs preliminary ECC data generation and error checking before the NVRAM data is actually needed for system operation. By pre-calculating ECC data from a copy in volatile RAM and comparing it with the original NVRAM data upon boot or low-power state transitions, the system prepares error correction capabilities in advance without requiring continuous memory resources.
2Reliability
If ECC data is written to NVRAM during every system operation, then error correction capability is maintained, but wear on NVRAM parts increases due to excessive write/erase cycles
Solution Approach 1:
Instead of continuously writing ECC data to NVRAM during every operation, the system periodically updates ECC data only during low-power state transitions (such as S3, S4, or S5 states). This periodic approach maintains error correction capability while significantly reducing the frequency of write/erase cycles, thereby extending NVRAM lifespan.
Solution Approach 2:
The patent changes the operational parameters of ECC data management by transitioning from continuous updates to periodic updates based on system power states. This parameter change allows the system to maintain adequate error protection while adapting the update frequency to match actual usage patterns and reduce unnecessary wear on NVRAM components.
3Reliability
If a second backup copy of NVRAM data is stored to enable error recovery, then data recovery capability is improved, but bill of materials cost increases
Solution Approach 1:
The patent creates a temporary copy of NVRAM data in volatile RAM for the purpose of generating ECC data, rather than creating a permanent second backup copy in additional storage media. This approach enables error detection and correction functionality without requiring extra non-volatile storage components, thus maintaining data recovery capability while avoiding increased bill of materials costs.
Data Source
AI summary
Systems and methods are provided that may be implemented to detect and optionally recover corrupted system configuration data written to non-volatile random access memory (NVRAM). The disclosed systems and methods may be implemented by writing a copy of the NVRAM data to volatile system memory (e.g., RAM) while the system is active. Error correction code (ECC) data may written to the NVRAM when the system enters a lower power state. When the system resumes from the low power state, the copy of data is made in system RAM from the NVRAM, and the ECC data is used to determine whether there are errors in NVRAM data, in which case the ECC data may be used to correct data in the copy on RAM before writing the corrected data to NVRAM from the system RAM.