NVRAM Data Ordering Preservation During Power Failure
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional computer systems, particularly network storage servers, face challenges in maintaining the proper ordering of write data destined for nonvolatile random access memory (NVRAM) during system power failures, as the memory controller hub (MCH) does not inherently guarantee data ordering, leading to potential corruption and inefficiencies in existing solutions.
Innovation Solution
The technique involves inhibiting data sources from initiating new write transactions and allowing pending data to commit to NVRAM, then placing NVRAM into a self-refresh state, with data presented in a continuous stream without explicit record separation, using signals like Stop Clock or System Management Interrupt to manage processor and peripheral device operations, ensuring data ordering and placement are preserved.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the MCH allows data to pass through without inherent ordering guarantees to maintain high throughput, then productivity is improved, but data ordering during power failures deteriorates
Solution Approach 1:
The patent applies preliminary action by detecting power failures before they occur and proactively flushing pending data from the MCH to the NVRAM. The system monitors power status and initiates data transfer operations in advance, ensuring that all data is committed to non-volatile storage before actual power loss occurs, thereby maintaining data ordering without sacrificing throughput during normal operation
Solution Approach 2:
The patent introduces an intermediary mechanism in the form of a power failure detection module and controlled flush operation that mediates between the high-speed MCH and the NVRAM. This intermediary layer monitors system state and selectively triggers data flushing, allowing the MCH to maintain high throughput during normal operation while ensuring data ordering is preserved when power failures occur
2Reliability
If flushing operations are performed frequently to ensure data ordering, then data integrity is improved, but processing overhead increases
Solution Approach 1:
The patent implements periodic action by performing data flushing operations only at specific intervals triggered by power failure events rather than continuously or after every write operation. The system adopts a event-driven periodic flush strategy where data is transferred from MCH to NVRAM in response to detected power failures, reducing unnecessary flushing overhead while maintaining data ordering when it matters most
Solution Approach 2:
The patent applies parameter changes by dynamically adjusting the flushing behavior based on system state parameters. The flush operation is controlled by power failure detection status, allowing the system to switch between aggressive flushing (when power failure detected) and minimal flushing (during normal operation), thereby optimizing the balance between data ordering and processing overhead through parameter-based control
Data Source
AI summary
A technique for efficiently preserving the ordering of data being written to a nonvolatile memory through a subsystem of a network storage system in the event of a power disruption, where the subsystem does not inherently guarantee that the ordering of the data will be preserved. The subsystem can be, for example, a memory controller hub. During normal operation of the system, data is written to the nonvolatile memory without flushing the data to the nonvolatile memory. In response to a power disruption in the system, data sources in the system that can initiate write transactions destined for the nonvolatile memory are inhibited from initiating write transactions destined for the nonvolatile memory, and pending write data within the subsystem is allowed to be committed to the nonvolatile memory. The nonvolatile memory is then placed into a self-refresh state.