NVRAM Write Cache Recovery via Volatile Memory Mediation

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Solution Overview

Problem

Conventional systems fail to recover from power loss events in non-volatile dual in-line memory modules (NVDIMM) effectively, leading to data inaccessibility and prolonged downtime due to inability to utilize failed components and loss of modified data stored in NVRAM.

Innovation Solution

A method is implemented where power is resupplied to NVRAM, and volatile memory is temporarily used as a write cache to allow system recovery, with markings indicating data loss in affected volumes, enabling earlier detection and recovery from power loss events.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If NVRAM is used as write cache to maintain data retention during power loss, then data reliability is improved, but system downtime increases when NVRAM experiences power loss failures

Engineering Contradiction:
Improvedata reliabilityVSAvoidsystem downtime
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces volatile memory as an intermediary temporary write cache when NVRAM fails. This mediator allows the system to continue operating with reduced data retention capabilities, bridging the gap between complete NVRAM failure and system shutdown, thereby reducing downtime while maintaining essential functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically switches write cache allocation between NVRAM and volatile memory based on operational status. When NVRAM is healthy, it serves as the primary write cache; when failure is detected, the system dynamically reallocates write cache to volatile memory, enabling adaptive response to component failures and reducing overall system downtime.

Inventive Principle:
Principle #15Dynamics

2Reliability

If NVRAM is temporarily guarded from further use after failure detection, then data integrity is improved, but productivity decreases due to reduced storage capacity

Engineering Contradiction:
Improvedata integrityVSAvoidstorage capacity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent temporarily discards the failed NVRAM component from active use and recovers storage capacity by utilizing volatile memory as an alternative write cache. This allows the system to maintain operational productivity while protecting data integrity, with the option to recover NVRAM functionality later through component replacement or repair.

Inventive Principle:
Principle #34Discarding and recovering

3Ease of operation

If volatile memory is used as temporary write cache to enable system recovery, then ease of operation is improved, but data loss risk increases due to volatile nature

Engineering Contradiction:
Improvesystem recoverabilityVSAvoiddata loss risk
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent implements beforehand cushioning by continuously monitoring NVRAM health status and proactively switching to volatile memory as temporary write cache before complete failure occurs. This preparatory measure cushions the system against total data loss by ensuring alternative write paths are available, reducing the shock of failure while accepting controlled data risk in volatile memory.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS11061818B1Recovering from write cache failures in servers
Publication Date: 2021.07.13 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11061818B1 patent drawing
  • US11061818B1 patent drawing
  • US11061818B1 patent drawing

AI summary

A computer-implemented method, according to one embodiment, includes: in response to experiencing a power loss event, resupplying power to NVRAM which includes a write cache. In response to detecting that the NVRAM has experienced a failure event, the NVRAM is temporarily guarded from further use. Moreover, a portion of volatile memory is allocated to serve as a temporary write cache. The allocated portion of volatile memory is also cleared. A determination is made as to whether data is present in the write cache in the NVRAM, and in response to determining that data is present in the write cache, one or more volumes in memory which correspond to the data present in the write cache in the NVRAM are marked as having experienced data loss. Furthermore, a warning is sent which indicates that data loss has been experienced by the one or more marked volumes in the memory.