NVRAM Wear-Leveling via Security Refresh Key Remapping
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Solution Overview
Problem
Nonvolatile memory (NVRAM) has limited write endurance and lifetime due to uneven wear patterns, which can be exacerbated by malicious writing, leading to premature failure.
Innovation Solution
A memory apparatus with a global wear-leveler and address remapper that moves data from hot blocks to free blocks using a security refresh key, remapping logical page addresses to physical page addresses to distribute write operations evenly and prevent memory destruction from malicious attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If wear-leveling is applied to extend memory lifetime, then memory lifetime is improved, but the memory may still fail due to malicious writing concentrating on specific areas
Solution Approach 1:
The patent introduces a security refresh key as an intermediary between the logical page address and the physical page address. This key acts as a mediator that randomizes the mapping relationship, preventing malicious writing from directly targeting specific physical areas while still allowing legitimate wear-leveling operations to function effectively
Solution Approach 2:
The patent changes the mapping parameter between logical and physical addresses by introducing a security refresh key that randomly modifies the address translation. This parameter change ensures that the same logical address maps to different physical locations across refresh cycles, distributing write operations evenly and preventing concentration on specific areas
2Stability of the object's composition
If data is moved from hot blocks to free blocks, then write distribution is improved, but additional control mechanisms are needed to prevent malicious exploitation
Solution Approach 1:
The security refresh key mechanism serves multiple functions simultaneously: it provides security protection against malicious attacks, enables effective wear-leveling by randomizing address mapping, and manages block state transitions between free and storage blocks. This multi-functionality reduces the need for separate control mechanisms
Data Source
AI summary
A memory apparatus and a method of wear-leveling of a memory apparatus may be provided. The memory apparatus may include a memory having a plurality of storage blocks and a plurality of free blocks. The memory apparatus may include a memory controller configured for performing a first global wear-leveling to move data of a first storage block, which is a hot block among the storage blocks, to a first free block among the free blocks. The memory apparatus may include a memory controller configured for remapping a result of a logic operation of a logical page address of each of the pages in the first storage block and a first security refresh key to a physical page address of each of the pages in the first free block.