Host-directed NVRAM Write Buffers for Flash Storage Latency

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Solution Overview

Problem

Existing storage systems face challenges in efficiently managing data storage and retrieval across multiple storage nodes, particularly in handling varying workload demands and optimizing system performance.

Innovation Solution

The proposed solution involves leveraging different indirection units to tune system performance based on workload demands, utilizing a storage system that includes multiple computing devices, storage arrays, and non-volatile RAM (NVRAM) devices to optimize data storage and retrieval processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is written directly to non-volatile storage media, then data persistence is ensured, but write latency increases

Engineering Contradiction:

Improvedata persistenceVSAvoidwrite latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces a volatile write buffer as an intermediary component between the host system and non-volatile storage media. Data is first written to the volatile buffer which provides fast write access, then asynchronously transferred to non-volatile storage. This mediator resolves the contradiction by decoupling the immediate write operation from the persistent storage operation, achieving both low latency and data persistence.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary actions by pre-allocating buffer space and pre-establishing data transfer pathways before actual write operations. The volatile write buffer is prepared in advance to receive incoming data, allowing write operations to complete quickly while the actual persistence to non-volatile media is handled subsequently through background processes.

Inventive Principle:

Principle #10Preliminary action

2Productivity

If write buffers are implemented on storage devices, then write performance improves, but device complexity increases

Engineering Contradiction:

Improvewrite performanceVSAvoiddevice complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent employs volatile memory for write buffers, which is inherently temporary and requires periodic flushing to non-volatile storage. This approach uses inexpensive, fast-but-volatile memory components rather than expensive non-volatile memory for buffering purposes. The volatile nature of the buffer simplifies its design and management, accepting that data must be periodically persisted elsewhere, thus improving write performance without proportionally increasing device complexity.

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS20250190148A1Host-directed non-volatile write buffers on solid-state storage devices

Publication Date: 2025.06.12 PURE STORAGE INC

AI summary

A first command including data to be stored in non-volatile random access memory (NVRAM) of a storage device is received from a storage system controller by a storage device controller. In response to receiving the first command, the data is stored in the NVRAM. One or more second commands including a location in flash memory of the storage device for storing the data and an instruction to store the data in the location of the flash memory are received from the storage system controller. In response to receiving the one or more second commands, the data is stored in the location of the flash memory.