NVRAM Write Coalescing for Storage Latency Reduction

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Traditional storage systems face inefficiencies in data management and reliability due to direct write operations to storage drives, leading to increased latency and unnecessary write operations, which can compromise data integrity and storage performance.

Innovation Solution

Implementing a system where storage array controllers offload device management responsibilities by using non-volatile random access memory (NVRAM) as a buffer for write operations, allowing for quicker data access and reduced latency, and employing erasure coding and mirroring for data redundancy across multiple storage nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If direct write operations are performed to storage drives, then data is stored, but latency increases and storage performance deteriorates

Engineering Contradiction:
Improvedata integrityVSAvoidwrite latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent introduces NVRAM as an intermediary buffer between the host system and storage drives. Write operations are first directed to the NVRAM cache in the storage array controller, which then asynchronously transfers data to the storage drives. This mediator absorbs the latency of physical write operations while presenting fast write acknowledgment to hosts, resolving the contradiction between data integrity and write latency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary write operations to the NVRAM cache before final commitment to storage drives. By pre-storing data in the faster NVRAM medium and using techniques like write coalescing and ordering, the system ensures data is ready for eventual disk write without blocking host operations, thereby reducing perceived latency while maintaining data integrity.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If multiple write operations are performed directly to storage drives, then data is stored, but the number of write operations increases unnecessarily

Engineering Contradiction:
Improvedata redundancyVSAvoidstorage efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements write coalescing that merges multiple pending write operations targeting the same storage drive into a single consolidated write operation. The NVRAM cache maintains write queues that combine sequential and random writes, reducing the total number of physical write operations to storage drives while maintaining data redundancy through proper ordering and acknowledgment mechanisms.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system temporarily holds write operations in NVRAM cache rather than immediately writing to storage drives. This allows the system to discard individual write boundaries and recover them as optimized batch operations, reducing redundant writes while maintaining data integrity through cache consistency protocols and eventual consistency models.

Inventive Principle:
Principle #34Discarding and recovering

3Ease of operation

If storage array controllers manage all device responsibilities, then centralized control is achieved, but controller complexity and processing overhead increase

Engineering Contradiction:
Improvecentralized managementVSAvoidcontroller complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent segments controller responsibilities by separating cache management functions from data path processing. The storage array controller is divided into distinct modules: NVRAM cache management unit handling write coalescing and ordering, and data path units handling actual I/O operations. This segmentation reduces single-point complexity while maintaining centralized control through coordinated module interaction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The NVRAM cache implements self-managing features including automatic write coalescing, ordering, and acknowledgment generation without requiring complex external coordination. The cache controller autonomously manages its own buffer allocations, write queues, and consistency protocols, reducing the processing overhead on the main storage array controller while maintaining centralized management capabilities.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20240303362A1Implementing Volume-Level Access Policies In Storage Systems
Publication Date: 2024.09.12 PURE STORAGE INC
  • US20240303362A1 patent drawing
  • US20240303362A1 patent drawing
  • US20240303362A1 patent drawing

AI summary

Data protection for container storage, including: assigning, to a container storage volume of a storage system, a volume-level access policy; and determining whether to allow access to the container storage volume based on the volume-level access policy and one or more attributes of a request for the access, including allowing the access responsive to the one or more attributes meeting the volume-level access policy or denying the access responsive to the one or more attributes failing to meet the volume-level access policy.