Non-volatile SRAM Cell Using Bistable Regenerative Circuit
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Solution Overview
Problem
Existing non-volatile static random access memory (SRAM) technologies face challenges in efficiently writing and storing data due to asymmetry in current levels during '0' and '1' operations, leading to potential damage to tunneling layers and data loss during power failures.
Innovation Solution
A non-volatile SRAM cell design incorporating bistable regenerative circuits and magnetic tunnel junctions (MTJs) with separate control and signal lines, allowing direct electrical connection of MTJs to the latch, enabling complementary data transfer between volatile and non-volatile memory portions without external sensing circuits, optimizing write and restore operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If asymmetric current levels are used for writing '0' and '1' in existing non-volatile SRAM, then write operation can be performed, but tunneling layer damage occurs and reliability deteriorates
Solution Approach 1:
The patent applies asymmetry in reverse - it uses symmetric current levels for writing '0' and '1' operations. The write driver circuit is designed to provide equal magnitude currents in opposite directions through the MTJ, eliminating the asymmetric current stress that damages the tunneling layer while maintaining full write capability for both logic states.
2Ease of operation
If external sensing circuits are used for data transfer, then data can be read, but chip area increases and complexity increases
Solution Approach 1:
The patent merges the data transfer function directly into the write driver circuit. The write driver not only drives write currents but also senses the resistive states of the MTJs during restore operations. This integration eliminates the need for separate external sensing circuits, reducing chip area and complexity while maintaining data transfer capability.
Solution Approach 2:
The write driver circuit is designed with multi-functionality, serving both as a write current source and as a sensing circuit for reading MTJ states. This universal circuit performs multiple functions (writing, sensing, and restoring data) that would traditionally require separate dedicated circuits, thereby reducing overall device complexity.
3Measurement precision
If separate control lines are used for MTJ control, then precise control is achieved, but device complexity increases
Solution Approach 1:
The control circuit generates multiple control signals (first and second control signals with opposite polarities) from a single control input. This multi-functional control mechanism uses one control line to precisely regulate both write and restore operations through differential signaling, achieving precise control without proportionally increasing the number of physical control lines.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances data transfer speed and reliability by reducing power consumption and chip area, allowing quick data saving and restoration without ancillary circuits, thus addressing the asymmetry issues and ensuring data integrity across power cycles.
Implementation Method 1
the voltage difference causes spin polarized electrons flowing from free layer 16 to reference layer 12 to transfer their angular momentum and change the magnetization direction of free layer 16
Implementation Method 2
A non-volatile static random access memory cell includes, in part, a bistable regenerative circuit, first and second transistors and first and second non-volatile memory cells... first magnetic tunnel junctions, and third and fourth transistors
Data Source
AI summary
A non-volatile static random access memory cell and includes a bistable regenerative circuit coupled to first and second transistors and to first and second non-volatile memory cells. Methods of use include directly transferring a complementary data bit between the non-volatile memory cell and the bistable regenerative circuit. Alternatively, complementary data from the bistable regenerative circuit may be regenerated by a sense amplifier and a second bistable regenerative circuit before being transferred to non-volatile memory cells in a column of memory cells. The bistable regenerative circuit may be reset to ground potential. Applications using the non-volatile SRAM cell with direct read out from the bistable regenerative circuit include a non-volatile flip-flop or non-volatile multiplexer.