Oblique Word Bit Line Arrangement for Semiconductor Memory Density
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Solution Overview
Problem
The challenge in semiconductor memory devices is to increase memory cell density within a limited area, as existing designs struggle to efficiently pack memory cells due to the fixed orthogonal arrangement of word and bit lines, which limits the overall density.
Innovation Solution
The semiconductor memory device addresses this by disposing word lines and bit lines obliquely, creating an included angle between their directions greater than 0 degrees and less than 90 degrees, allowing for a reduced memory cell size and enhanced density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If word lines and bit lines are arranged in a traditional orthogonal (90-degree) configuration, then the layout is simple and easy to manufacture, but the memory cell area is larger and memory cell density is lower
Solution Approach 1:
The patent changes the geometric parameter of the line arrangement from a fixed 90-degree orthogonal configuration to a variable angle configuration where the included angle between word lines and bit lines can be adjusted. This parameter change allows optimization of memory cell area while maintaining manufacturability, directly resolving the contradiction between density and complexity.
Solution Approach 2:
The patent introduces asymmetry in the line arrangement by using non-perpendicular angles between word lines and bit lines. This asymmetric configuration optimizes the spatial utilization within the memory cell, reducing the required area per cell while the pitch arrangements maintain manufacturing feasibility, thus balancing density improvement with manufacturing complexity.
2Area of moving object
If word lines and bit lines are disposed obliquely with an included angle larger than 0 degree and smaller than 90 degrees, then the memory cell area is reduced and density is increased, but the pitch arrangement becomes more complex
Solution Approach 1:
The patent optimizes the included angle parameter between word lines and bit lines to achieve the best balance between memory cell area reduction and manufacturing ease. By carefully selecting specific angle values and corresponding pitch arrangements, the patent reduces memory cell area while keeping the pitch arrangements within manufacturable limits, directly addressing the contradiction between area reduction and manufacturing complexity.
Data Source
AI summary
A semiconductor memory device includes a semiconductor substrate, a plurality of word lines, and a plurality of bit lines. The semiconductor substrate includes a plurality of active areas. The word lines are disposed parallel to one another, and each of the word lines is elongated in a first direction. Each of the word lines overlaps at least one of the active areas. The bit lines are disposed parallel to one another, and each of the bit lines is elongated in a second direction. Each of the bit lines overlaps at least one of the active areas. The bit lines cross the word lines. An included angle between the first direction and the second direction is larger than 0 degree and smaller than 90 degrees.