Observation Point Injection for Monolithic 3D IC Fault Localization
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Solution Overview
Problem
Monolithic 3D integrated circuits face challenges in manufacturing defects and inter-tier process variations due to sequential fabrication, making tier-level fault localization difficult, especially with limited observation points on outgoing inter-layer vias, which hampers efficient testing and yield ramp-up.
Innovation Solution
A method for identifying and inserting observation points within integrated circuits, transforming the netlist into a node graph, and propagating values to determine output nodes with effective observability, allowing for efficient fault localization in monolithic three-dimensional integrated circuits without relying on time-consuming automated test pattern generation or fault simulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If observation points are inserted on outgoing inter-layer vias to enable fault localization, then tier-level fault localization capability is improved, but device complexity and testing overhead increase
Solution Approach 1:
The patent segments the integrated circuit into multiple tiers and identifies specific observation points at the outgoing inter-layer vias between tiers. By dividing the circuit into manageable segments and placing observation points at the interfaces between segments, the system enables fault localization at the tier level without requiring comprehensive observation throughout the entire circuit, thus reducing overall complexity.
Solution Approach 2:
The patent applies local quality by selectively placing observation points only at critical locations (outgoing inter-layer vias) where fault localization is most beneficial, rather than uniformly distributing observation points throughout the entire circuit. This localized approach provides sufficient fault localization capability at key interfaces while minimizing the added complexity and overhead.
2Ease of manufacture
If sequential fabrication of M3D tiers is used to enable monolithic integration, then manufacturing capability is improved, but manufacturing defects and inter-tier process variations increase
Solution Approach 1:
The patent performs preliminary fault localization analysis during the design phase by identifying observation points and creating test structures before fabrication. This preliminary action allows for the identification of potential fault locations and the development of targeted testing strategies that can detect manufacturing defects and process variations in the final monolithic 3D IC, enabling yield optimization without changing the fabrication process itself.
3Device complexity
If limited observation points are inserted on outgoing inter-layer vias to reduce overhead, then device complexity is reduced, but fault localization accuracy deteriorates
Solution Approach 1:
The patent applies partial action by inserting observation points only at the outgoing inter-layer vias rather than at every possible location in the circuit. This selective placement provides sufficient fault localization accuracy for tier-level analysis while avoiding the excessive complexity and overhead that would result from comprehensive observation point placement throughout the entire monolithic 3D IC structure.
Data Source
AI summary
A method for identifying observation points for integrated circuit (IC) testing includes receiving a netlist for an IC that includes a first subcircuit and a second subcircuit; determining, from the netlist, one or more observation points, each determined observation point corresponding to an output node which provides observability, into at least the first subcircuit, of an effective number of gates above a specified threshold; and inserting a design for test element into a layout file of the IC at each determined observation point. Observation points can be determined by transforming the netlist into a node graph; assigning a same initial value to a value field of each node; and propagating values in the value fields of the nodes until all nodes with a succeeding edge have a value of zero in their value fields.