Odd-Even Pixel Driving Layout for High-Refresh Display Uniformity
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Solution Overview
Problem
Conventional display panel driving methods struggle with insufficient threshold voltage compensation capability when the refresh rate is increased, leading to uneven display.
Innovation Solution
A display panel design with odd and even-numbered row connections for gate and data lines, along with delayed gate driving signals and multiplexing circuits for data voltage distribution, ensuring adequate threshold voltage compensation and higher refresh rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the refresh rate of the display panel is increased to a predetermined speed, then the data refresh speed is improved, but the threshold voltage compensation capability becomes insufficient
Solution Approach 1:
The gate driving signals are segmented into odd-numbered and even-numbered columns, with each column type receiving signals from dedicated gate lines. This segmentation allows independent optimization of signal timing for each column group, enabling sufficient threshold voltage compensation for each segment while maintaining high overall refresh rates.
Solution Approach 2:
The patent implements periodic gate driving signals with alternating patterns for odd and even columns. By using periodic actions with different timing phases for different column groups, the system ensures that each group receives adequate compensation time while the overall display operates at high refresh rates.
2Speed
If the refresh rate of the display panel is increased to a predetermined speed, then the data refresh speed is improved, but the display uniformity deteriorates
Solution Approach 1:
The display panel is divided into odd-numbered and even-numbered column groups, each driven by separate gate lines with staggered timing. This segmentation allows each group to be optimized independently for uniform display performance while collectively achieving high refresh rates without display artifacts or non-uniformity.
Solution Approach 2:
Different gate driving signal timing characteristics are applied to different column groups (odd vs even columns). By tailoring the signal characteristics locally to each column group's specific timing requirements, the patent ensures uniform display quality across the entire panel while maintaining high overall refresh performance.
3Reliability
If multiple gate lines and data lines are used for each row and column of pixel circuits, then the threshold voltage compensation capability is improved, but the device complexity increases
Solution Approach 1:
Multiple gate lines and data lines are merged through time-division multiplexing, where odd and even column gate lines are interleaved in time. This merging approach reduces the physical number of signal lines required while maintaining the functional benefits of multiple independent driving paths for improved threshold voltage compensation.
Solution Approach 2:
The patent uses periodic alternating activation of odd and even column gate lines and data lines. By implementing periodic action with alternating patterns, the system achieves the functionality of multiple independent line sets while physically requiring fewer lines, thus reducing device complexity while maintaining compensation capability.
Data Source
AI summary
The display panel includes a plurality of rows and a plurality of columns of pixel circuits, a plurality of rows of gate lines, a plurality rows of reset control lines, and a plurality of columns of data lines, a same row of pixel circuits corresponds to two rows of gate lines, and one/the other row of gate line is electrically connected to odd/even-numbered columns of pixel circuits in the row of pixel circuits, and provides a corresponding gate driving signal for the odd/even-numbered columns of pixel circuits; a same column of pixel circuits corresponds to two columns of data lines, and one/the other column of data line of the two columns of data lines is electrically connected to odd/even-numbered rows of pixel circuits, and provides a corresponding data voltage for the odd/even-numbered rows of pixel circuits.


