Odd-Level PAM Driver Encoding for Zero-Average Current
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Solution Overview
Problem
PAM signaling schemes with an odd number of output levels, such as PAM-3 and PAM-5, face reliability issues due to non-zero average current in driver circuits, leading to increased electro-migration concerns.
Innovation Solution
Introduce an alternative encoding for the '0' output level by swapping the halves of the driver circuit, ensuring the average current is zero or about zero, using a processor to control input signals to achieve this.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If PAM signaling schemes with an odd number of output levels are used, then the modulation capability is improved, but the driver circuit reliability deteriorates due to non-zero average current causing electro-migration
Solution Approach 1:
The patent applies periodic action by alternating between two different encodings for the '0' output level. The first encoding uses a first set of input signals, and the second encoding uses a second set of input signals. This periodic switching ensures that the average current over time is zero, preventing electro-migration while maintaining the required modulation capability for odd-level PAM signaling.
Solution Approach 2:
The patent changes the input signal parameters to achieve different current characteristics. By using two different sets of input signals for the same '0' output level, the circuit parameters (current direction and magnitude) are varied periodically, resulting in zero average current while preserving the output modulation capability.
2Device complexity
If traditional encoding for odd-level PAM is used, then the signaling scheme is simple, but electro-migration increases due to non-zero average current
Solution Approach 1:
The patent introduces periodic action by implementing two different encodings that alternate over time. This periodic switching of encoding schemes transforms the harmful non-zero average current into a zero average current condition, eliminating electro-migration while adding minimal complexity to the encoding process.
Solution Approach 2:
The patent applies preliminary action by pre-defining two different encoding schemes for the '0' output level before operation. The system selectively applies the appropriate encoding based on timing or state, ensuring that the average current is zero from the outset, thereby preventing electro-migration before it can cause damage.
3Reliability
If complementary voltage mode driver circuit is used for even-level PAM, then the average current is zero improving reliability, but it cannot be directly applied to odd-level PAM
Solution Approach 1:
The patent segments the encoding process into two distinct encodings for the '0' output level. By dividing the single encoding approach into two alternative encodings that alternate over time, the system achieves zero average current (similar to even-level PAM) while maintaining compatibility with odd-level PAM signaling requirements.
Solution Approach 2:
The patent applies inversion by considering the problem from a different perspective: instead of trying to modify the driver circuit to handle odd-level PAM directly, it inverts the approach by modifying the encoding scheme. By using two complementary encodings that are inverses of each other in terms of current direction, the system achieves zero average current while maintaining odd-level PAM functionality.
Data Source
AI summary
The present disclosure describes embodiments of driver circuit. The driver circuit includes a first impedance element electrically coupled to a first inverter circuit and a second impedance element electrically coupled to the first impedance element and a second inverter circuit. For a first encoding using the driver circuit, the first inverter circuit and the second inverter circuit are controlled such that a first current flows through the first and second impedance elements, the first current having a first value and a first direction. For a second encoding using the driver circuit, the first inverter circuit and the second inverter circuit are controlled such that a second current flows through the first and second impedance elements, the second current having a second value and a second direction. The first value is substantially the same as the second value and the first direction is opposite to the second direction.