Odd-Parity Coding Circuit for Double Correction and Triple Detection
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Solution Overview
Problem
Conventional BCH coding circuits face increased circuit area and power consumption when adding triple error detection, and they are limited in triple error detection capability due to the risk of misdiagnosing triple errors as double errors.
Innovation Solution
A coding circuit using an odd parity generator matrix is introduced, where each column has an odd number of 1's, allowing for efficient generation and decoding of codewords with reduced parity bits, effectively correcting double errors and detecting triple errors without misdiagnosis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If triple error detection function is added to conventional BCH coding circuit, then triple error detection capability is improved, but circuit area and power consumption increase
Solution Approach 1:
The patent changes the fundamental parameter of the parity generator matrix by requiring each column to have an odd number of 1's. This parameter change enables the circuit to achieve triple error detection capability while maintaining the same circuit area and power consumption as conventional double error correction circuits, because the odd parity structure allows syndrome values to uniquely identify triple error patterns without requiring additional hardware resources.
2Reliability
If conventional BCH coding circuit is used for triple error detection, then error detection function is improved, but measurement precision deteriorates due to misdiagnosis risk
Solution Approach 1:
By changing the parameter of the parity generator matrix to enforce odd parity (each column has an odd number of 1's), the patent ensures that the syndrome value for any triple error pattern is unique and cannot coincide with a double error syndrome. This eliminates the misdiagnosis problem inherent in conventional BCH circuits, achieving both triple error detection and perfect detection accuracy.
3Reliability
If number of parity bits is increased to add triple error detection, then error detection capability is improved, but codeword length increases
Solution Approach 1:
The patent changes the structural parameter of the parity generator matrix to enforce odd parity constraints on each column. This parameter change allows the existing parity bits to encode additional triple error detection information without increasing the total number of parity bits or codeword length, thereby maintaining storage efficiency while enhancing error detection capability.
Data Source
AI summary
A coding circuit includes an encoder circuit configured to generate an input codeword by concatenating an input data and a parity generated by processing the input data using an odd parity generator matrix; and a decoder circuit configured to correct a double error from an output codeword, and to detect a triple error using a syndrome generated by processing the output codeword using the odd parity generator matrix, wherein each column of the odd parity generator matrix has a respective odd number of 1's.