ODT Impedance Calibration Using Adjustable Reference Voltages
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Solution Overview
Problem
Conventional semiconductor systems face limitations in preventing undesirable signal reflections, especially in high-performance chips like DDR2 SDRAM, due to termination resistors being outside the chips, leading to noise issues. To address this, on-die termination (ODT) circuits with variable resistance values based on PVT conditions require calibration.
Innovation Solution
An impedance calibration circuit that includes a first calibration voltage driver, a control code generator, and a reference voltage generator, which compare and adjust calibration voltage signals with reference and target voltage signals to generate control codes for calibrating ODT circuits, improving impedance matching by controlling reference voltage levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If termination resistors are disposed outside semiconductor chips, then impedance matching can be achieved, but signal reflections and noise increase
Solution Approach 1:
The patent merges the termination resistor function with the semiconductor chip by integrating ODT circuits directly onto the chip. This combines the termination function with the memory chip, eliminating the need for external termination resistors and reducing signal reflections while maintaining impedance matching.
Solution Approach 2:
The ODT circuit is nested within the semiconductor chip structure, with the termination resistor functionality embedded inside the chip rather than placed externally. This nesting approach allows the termination function to be integrated into the existing chip architecture.
2Use of energy by moving object
If ODT circuits are used to reduce power consumption, then power efficiency improves, but resistance values vary according to PVT conditions requiring calibration
Solution Approach 1:
The patent implements a feedback mechanism where a calibration circuit measures the actual resistance value of the ODT circuit and generates calibration codes to adjust the resistance. This feedback loop compensates for PVT variations by dynamically adjusting the ODT resistance to match the target impedance value.
Solution Approach 2:
The calibration circuit changes the resistance parameter of the ODT circuit by applying calibration codes that adjust the resistance value. This parameter adjustment compensates for PVT variations and ensures the ODT resistance matches the required impedance value under different operating conditions.
3Measurement precision
If calibration circuits compare calibration voltage with constant reference voltage, then impedance calibration can be performed, but accuracy decreases under varying PVT conditions
Solution Approach 1:
The patent makes the reference voltage dynamic by generating it based on the operating voltage rather than using a constant reference voltage. This dynamic reference voltage adapts to PVT conditions, allowing accurate impedance calibration across different voltage, temperature, and process conditions.
Solution Approach 2:
The reference voltage parameter is changed from a constant value to a variable value that depends on the operating voltage. This parameter change allows the calibration circuit to maintain accuracy under varying PVT conditions by adjusting the reference voltage accordingly.
Data Source
AI summary
An impedance calibration circuit includes a first calibration voltage driver configured to operate in response to a first enable signal, compare a first calibration voltage signal with a first reference voltage signal, and drive the first calibration voltage signal, a first control code generator configured to operate in response to a second enable signal, compare the first calibration voltage signal with a first target voltage signal, and generate a first control code signal, and a first reference voltage generator configured to generate the first reference voltage signal in response to the first control code signal.