On-Die Termination Control in Multi-Rank Memory for Lower Power

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Solution Overview

Problem

On-die termination (ODT) in semiconductor integrated circuits enhances signal integrity but increases power consumption, necessitating a method to reduce power consumption while maintaining signal integrity.

Innovation Solution

Implementing a method where ODT circuits are enabled in an initial state during power-on, enabled during write operations for target memory ranks, and disabled during read operations, while maintaining enabled states for non-target memory ranks, allowing for static ODT control and reduced power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ODT circuits are enabled to enhance signal integrity, then signal integrity is improved, but power consumption increases

Engineering Contradiction:

Improvesignal integrityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the ODT circuit state changeable between enabled and disabled modes based on operational conditions. The ODT circuit is dynamically controlled to be enabled during write operations and disabled during read operations, allowing the system to adapt its termination state to current operational requirements rather than maintaining a fixed state.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent applies local quality by enabling ODT circuits selectively in specific memory ranks based on whether they are target or non-target ranks during different operations. Non-target memory ranks maintain enabled ODT circuits while target ranks have ODT disabled during read operations, creating localized quality differences across different parts of the memory system.

Inventive Principle:

Principle #3Local quality

2Reliability

If ODT circuits are enabled during read operations to reduce signal reflection, then signal integrity is improved, but standby power consumption increases

Engineering Contradiction:

Improvesignal integrityVSAvoidstandby power consumption

Core Design Contradiction:

ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent applies periodic action by alternating the ODT circuit state between enabled and disabled modes based on the operation type. During read operations, the ODT circuit is disabled to reduce standby power consumption, while during write operations, it is enabled to maintain signal integrity. This periodic switching between states allows the system to optimize for different operational requirements.

Inventive Principle:

Principle #19Periodic action

Solution Approach 2:

The patent applies parameter changes by modifying the resistance state of the ODT circuit from enabled (low impedance) to disabled (high impedance) based on operational mode. This parameter change allows the circuit to present different electrical characteristics appropriate for read versus write operations, optimizing both power consumption and signal integrity for each operation type.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS10692554B2Method of controlling on-die termination and system performing the same

Publication Date: 2020.06.23 SAMSUNG ELECTRONICS CO LTD

AI summary

A method of controlling on-die termination (ODT) in a multi-rank system including a plurality of memory ranks is provided. The method includes: enabling ODT circuits of the plurality of memory ranks into an initial state when the multi-rank system is powered on; enabling the ODT circuits of a write target memory rank and non-target memory ranks among the plurality of memory ranks during a write operation; and disabling the ODT circuit of a read target memory rank among the plurality of memory ranks while enabling the ODT circuits of non-target memory ranks among the plurality of memory ranks during a read operation.