On-Die Termination Calibration Using Current Mirrors for Low-Noise Matching
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Solution Overview
Problem
Conventional on-die termination (ODT) circuits face challenges with noise and increased current consumption due to direct use of ZQ node voltage for calibration, leading to impedance mismatch and distortion in high-speed data transmission.
Innovation Solution
The ODT circuit employs a current mirror to mirror currents from an external resistor and calibration resistors, generating calibration codes based on these mirrored currents instead of directly using ZQ node voltage, thereby reducing noise and current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If ZQ node voltage is directly used for calibration, then calibration can be performed, but noise increases and current consumption increases
Solution Approach 1:
The patent introduces an intermediary calibration circuit that includes calibration resistors and switching elements between the ZQ node and the external resistor. This intermediary structure processes the calibration signal indirectly, preventing direct connection of the noisy ZQ node voltage to the calibration comparison point, thereby reducing noise while maintaining calibration functionality
Solution Approach 2:
The patent creates a copied version of the calibration function using internal calibration resistors that mimic the external resistor's behavior. Instead of directly using the noisy ZQ node voltage, the circuit compares voltages developed across matched resistor structures, creating a clean reference that copies the calibration function without the noise
2Measurement precision
If ZQ node voltage is directly used for calibration, then calibration can be performed, but current consumption increases
Solution Approach 1:
The calibration circuit uses switching elements (transistors) as intermediaries to control current flow during calibration. These switches enable or disable calibration current paths based on calibration phase requirements, preventing continuous current draw while maintaining calibration accuracy when needed
Solution Approach 2:
The patent implements periodic calibration by using control signals to activate calibration circuits only during specific calibration phases rather than continuously. The switching elements respond to periodic enable signals, allowing calibration to occur at discrete intervals, which reduces average current consumption while maintaining calibration accuracy when performed
3Reliability
If calibration circuit is kept enabled, then calibration accuracy is maintained, but current consumption increases
Solution Approach 1:
The patent makes the calibration circuit dynamic by introducing control signals that enable or disable calibration functions based on operational requirements. The switching elements change state dynamically, allowing the circuit to transition between active calibration mode and low-power standby mode, thus maintaining reliability when needed while reducing power consumption during normal operation
Solution Approach 2:
The calibration circuit is discarded (disabled) during normal operation to save power, and recovered (enabled) when calibration is needed. The control logic manages this discard-and-recover cycle, maintaining calibration reliability by periodically recovering the calibration function while discarding it during steady-state operation to minimize current consumption
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces noise interference and lowers power consumption, enabling faster and more efficient calibration with reduced current flow, even when the circuit is kept in an enabled state.
Implementation Method 1
a current mirror configured to mirror currents of the first node and the second node
Data Source
AI summary
On die termination circuit and method for calibrating the same includes a external resistor connected to a first node, a plurality of calibration resistors connected to a second node, the plurality of calibration resistors being turned on/off in response to a calibration code set, a current mirror configured to mirror currents of the first node and the second node and a code generator configured to generate a calibration code set according to the mirrored currents. In accordance with a method for calibrating an on die termination circuit of the present invention, the method includes a step of mirroring a current of a first node connected to an external resistor and a current of a second node connected to a plurality of calibration resistors and a step of generating a calibration code set according to the mirrored currents.