ODT Impedance Calibration Circuit for Precise Pad Resistance Matching

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Solution Overview

Problem

In high-speed electronic systems, the impedance mismatch between semiconductor devices and transmission channels leads to signal reflection and distortion, which existing On Die Termination (ODT) circuits fail to address effectively due to limitations in precision and parasitic capacitance.

Innovation Solution

An impedance calibration circuit with multiple On Die Termination (ODT) circuits and a selection unit that adjusts resistance values based on code signals and reference voltages, minimizing parasitic capacitance and improving impedance matching across varying PVT conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single ODT circuit is used for impedance calibration, then device complexity is reduced, but measurement precision deteriorates due to inability to cover full resistance range accurately

Engineering Contradiction:
Improvenumber of ODT circuitsVSAvoidresistance calibration precision
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The impedance calibration circuit is divided into multiple ODT circuits (first ODT circuit and second ODT circuit), each responsible for different resistance ranges. This segmentation allows each circuit to be optimized for specific calibration intervals, improving overall measurement precision while maintaining manageable complexity through modular design

Inventive Principle:
Principle #1Segmentation

2Ease of manufacture

If external termination resistors are used, then impedance matching is simple, but power consumption increases and integration density decreases

Engineering Contradiction:
Improveimpedance matching simplicityVSAvoidpower consumption
Core Design Contradiction:
Ease of manufactureVSUse of energy by moving object

Solution Approach 1:

The termination resistor function is merged with the ODT circuit by integrating the termination resistor inside the semiconductor device along with the ODT circuit. This integration eliminates the need for separate external termination resistors, reducing power consumption and increasing integration density while maintaining impedance matching capability through the combined structure

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The ODT circuit acts as an intermediary between the semiconductor device and the transmission channel, providing dynamic impedance matching. By using switching circuits within the ODT to adjust resistance values, the system achieves adaptive impedance matching that compensates for PVT variations, replacing the static external termination resistor approach

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If ODT resistance is fixed, then circuit design is simple, but adaptability to PVT conditions deteriorates

Engineering Contradiction:
Improvecircuit design simplicityVSAvoidPVT condition adaptability
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The ODT circuit incorporates switching circuits that enable dynamic adjustment of resistance values based on PVT conditions. The switching circuits can selectively connect different resistance elements, allowing the ODT resistance to adapt to process, voltage, and temperature variations. This dynamic capability is controlled by calibration codes that optimize impedance matching across different operating conditions

Inventive Principle:
Principle #15Dynamics

4Device complexity

If impedance calibration is not performed, then device complexity is reduced, but signal integrity deteriorates due to impedance mismatch

Engineering Contradiction:
Improvecalibration circuit presenceVSAvoidsignal integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Impedance calibration is performed in advance during the initialization phase before normal operation begins. The calibration process determines optimal resistance values by comparing signals at different impedance settings, and these calibration results are stored for use during subsequent operations. This preliminary calibration ensures signal integrity is optimized before actual data transmission starts

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10003323B2Impedance calibration circuit
Publication Date: 2018.06.19 SK HYNIX INC
  • US10003323B2 patent drawing
  • US10003323B2 patent drawing
  • US10003323B2 patent drawing

AI summary

An impedance calibration circuit is disclosed, which relates to a technology for improving precision of pad resistance. The impedance calibration circuit includes: a first On Die Termination (ODT) circuit selected by a first selection signal, configured to tune its own resistance using a first code signal, and output a first resistance value to an output terminal; and a second ODT circuit selected by a second selection signal, configured to tune its own resistance using a second code signal, and output a second resistance value to the output terminal.