On-Die Termination Circuit With Opposing Resistance Response
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing On Die Termination (ODT) circuits in memory devices are unstable and fail to maintain resistance within specific ranges required for high-speed operations, such as LPDDR4 and LPDDR5 specifications, leading to degraded signal integrity.
Innovation Solution
An ODT circuit design featuring a pair of transistors with opposite resistance change trends in response to voltage changes, stabilized by connecting the second transistor's control terminal to both the power supply voltage and signal input through an inverter and additional transistor, ensuring resistance remains within a preset range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the operating speed of the memory device is increased to improve productivity, then the bandwidth of the data transmitted by the channel increases, but the signal quality degrades due to reduced signal integrity
Solution Approach 1:
The patent changes the resistance parameter of the ODT circuit dynamically in response to voltage changes. The circuit includes transistors configured to adjust the termination resistance based on the voltage level at the signal input terminal, thereby maintaining optimal signal integrity across different operating conditions and speeds
Solution Approach 2:
The patent implements a feedback mechanism where the ODT circuit continuously monitors the voltage at the signal input terminal and adjusts its resistance accordingly. This feedback loop ensures that the termination resistance adapts to maintain signal integrity as the operating speed and bandwidth increase
2Reliability
If a conventional ODT circuit is used to reduce signal noise and prevent signal reflection, then signal integrity is improved, but the resistance becomes unstable and fails to maintain resistance within specific ranges required for high-speed operations
Solution Approach 1:
The patent employs parameter changes by configuring transistors to dynamically adjust the resistance value in response to voltage changes. This ensures the resistance remains within the specific range required for high-speed operations like LPDDR4 and LPDDR5, resolving the instability issue of conventional ODT circuits
Solution Approach 2:
The patent transforms the static resistance of conventional ODT circuits into a dynamic parameter that automatically adjusts with voltage changes. The circuit includes transistors whose resistance characteristics change in response to the voltage at the signal input terminal, providing stable resistance within required ranges under varying operating conditions
Data Source
AI summary
An on die termination (ODT) circuit includes a signal input terminal; a grounding terminal; a first transistor including a control terminal and a first terminal which are electrically connected with the signal input terminal, and a second terminal electrically connected with the grounding terminal; and a second transistor including a control terminal electrically connected with the signal input terminal, a first terminal, and a second terminal electrically connected with the grounding terminal, and when voltage of the signal input terminal changes, the first transistor has a change trend of resistance opposite to that of the second transistor.

