ODTU Frame Generation Using Generic Mapping Procedure Circuits

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Solution Overview

Problem

In optical networks employing wavelength division multiplexing, existing technologies face challenges in accommodating client signals with varying bit rates using generic mapping procedures, requiring efficient generation of optical data transfer unit frames to manage bit rate differences and ensure reliable transmission.

Innovation Solution

A frame generating apparatus comprising a deserializer and multiple generic mapping procedure (GMP) circuits that deserialize client signals into parallel signals and insert data and stuff into optical data transfer unit frames based on bit rate differences, enabling the generation of ODTU frames suitable for higher bit rates, thereby facilitating efficient signal accommodation and transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If asynchronous mapping procedure (AMP) is used to accommodate client signals in OTN frames, then bit rate differences can be compensated, but the system cannot efficiently accommodate signals with higher bit rates than the frame signal

Engineering Contradiction:
Improveaccommodation of higher bit rate signalsVSAvoidtransmission reliability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent changes the mapping procedure from AMP to GMP, which dynamically adjusts the number of data and stuff bytes based on bit rate differences. This parameter change enables the system to accommodate client signals with higher bit rates than the frame signal by allowing flexible allocation of frame accommodating portion bytes, thereby resolving the contradiction between adaptability and reliability.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If generic mapping procedure (GMP) is adopted to accommodate higher bit rate client signals, then signal adaptability improves, but frame generation complexity increases

Engineering Contradiction:
Improvesignal accommodation flexibilityVSAvoidframe generation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the frame generation process into distinct functional blocks: a deserializer that converts serial client signals into parallel signals, multiple GMP circuits that independently process different tributary slots, and a serializer that reconstructs the parallel signals. This segmentation reduces frame generation complexity by distributing the GMP processing load across multiple specialized circuits, each handling specific aspects of the mapping procedure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a time dimension to the frame generation process by using multiple GMP circuits that operate in parallel on different tributary slots. Instead of processing all GMP operations sequentially in a single circuit, the system processes multiple tributary slots simultaneously across different time cycles, thereby reducing overall processing complexity while maintaining signal accommodation flexibility.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If the number of GMP circuits is increased to handle more tributary slots, then signal accommodation capacity increases, but device complexity and resource consumption increase

Engineering Contradiction:
Improvesignal processing capacityVSAvoidcircuit quantity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent designs each GMP circuit to be universal and multi-functional, capable of processing multiple tributary slots through time-division multiplexing. Each GMP circuit can dynamically allocate its processing resources to different tributary slots based on the accommodation requirements, allowing a smaller number of GMP circuits to handle a larger number of tributary slots without proportionally increasing device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUSRE48932E1Frame generating apparatus and frame generating method
Publication Date: 2022.02.15 FUJITSU LTD
  • USRE48932E1 patent drawing
  • USRE48932E1 patent drawing
  • USRE48932E1 patent drawing

AI summary

A frame generating apparatus accommodating a client signal in an optical data transfer unit frame with a higher bit rate than the client signal includes a deserializer, a plurality of generic mapping procedure circuits, and a serializer. The deserializer deserializes the client signal into parallel signals, the number of parallel signals corresponding to the number of tributary slots used in the optical data transfer unit frame. The plurality of generic mapping procedure circuits inserts data and stuff into a frame accommodating portion of the optical data transfer unit frame based on a difference in the bit rate between the client signal and the optical data transfer unit frame. The serializer serializes the parallel signals output from the plurality of generic mapping procedure circuits.