OFDM De-Interleaver Address Generation for Correlated Fading

The data stream is segmented into blocks that are interleaved across different sub-carrier signals. The symbol interleaver divides the incoming data symbols into groups and maps them to different sub-carriers in a scrambled order, while the bit interleaver further segments the LDPC encoded bits within each symbol. This multi-level segmentation approach distributes correlated fading effects across multiple segments, improving reliability without requiring excessive complexity in any single stage.

The patent introduces interleaving in the frequency dimension by mapping data symbols to different sub-carrier frequencies in a permuted order. The linear feedback shift register generates pseudo-random sequences that determine the frequency mapping, effectively spreading data across the frequency spectrum. This dimensional transformation from sequential to frequency-scattered mapping protects against frequency-selective fading while maintaining manageable system complexity.

The inverse permutation operation is performed as a preliminary step before LDPC decoding. By reordering the received symbols and bits back to their original sequence positions, the system prepares the data in an optimal format for decoding. This preliminary arrangement concentrates error patterns in a way that makes them more amenable to LDPC correction, improving reliability without adding significant processing overhead since the permutation follows a deterministic pattern.

The linear feedback shift register uses feedback from previous stages to generate the permutation sequence. This feedback mechanism creates a pseudo-random yet deterministic pattern that spreads and concentrates errors in controlled ways. The feedback-based generation ensures that the inverse permutation at the receiver perfectly reverses the transmission-side permutation, maintaining synchronization without requiring complex external control signals.

The linear feedback shift register acts as an intermediary component that generates pseudo-random sequences to control the interleaving process. Rather than using complex external control logic or lookup tables, the LFSR provides a self-contained source of deterministic randomness that drives both the symbol and bit interleaving operations. This intermediary mechanism achieves reliable fading channel performance while keeping the address generation logic relatively simple and self-sufficient.

The system changes the parameter of address generation from simple sequential counting to pseudo-random sequence generation using LFSR. By modifying the address generation parameter to use feedback-based pseudo-random sequences, the system achieves better frequency diversity and fading resistance. The LFSR parameters (polynomial coefficients and initial state) can be adjusted to match different channel conditions, providing flexibility without substantial complexity increases.