OFDM De-Interleaving and LDPC Recovery for Correlated Fading

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Solution Overview

Problem

Existing OFDM communication systems face challenges in improving the integrity of data transmission, particularly in DVB-T and DVB-H, due to correlated fading in terrestrial broadcast channels, which affects the performance of error correction coding schemes like LDPC/BCH codes.

Innovation Solution

A data processing apparatus that combines bit interleaving/de-interleaving with symbol interleaving/de-interleaving, using a symbol de-interleaver, de-mapping unit, inverse permuter, and LDPC decoder to recover data bits from OFDM symbols, ensuring that LDPC encoded data bits are permuted to avoid errors and improve error correction performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If symbol interleaving is used to improve data integrity, then resistance to correlated fading improves, but device complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidinterleaver complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The interleaver is divided into multiple independent interleaving sections, each handling a portion of the data symbols. This segmentation allows the system to achieve comprehensive interleaving coverage while keeping each individual section simpler and more manageable, thus improving data integrity without proportionally increasing overall device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a multi-dimensional interleaving approach where data symbols are interleaved across both time (different OFDM symbols) and frequency (different sub-carriers) dimensions. This dimensional expansion allows the system to combat correlated fading more effectively by dispersing data across multiple dimensions, achieving improved reliability without requiring excessively complex single-dimension interleaving structures.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If bit interleaving and symbol interleaving are combined to improve error correction performance, then resistance to burst errors improves, but device complexity increases

Engineering Contradiction:
Improveerror correction performanceVSAvoidinterleaving system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines bit-level interleaving and symbol-level interleaving into a unified interleaving system. By merging these two interleaving operations, the system achieves enhanced error correction performance that addresses both bit errors and burst errors simultaneously. The combined approach leverages the complementary strengths of both interleaving methods while sharing common hardware resources, thus improving reliability without a linear increase in device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The interleaving apparatus is designed with multi-functional capability to perform both bit interleaving and symbol interleaving operations using shared hardware components. This universal design allows the same physical structure to serve multiple interleaving functions, achieving comprehensive error correction performance while minimizing the increase in device complexity through resource sharing and functional integration.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If LDPC encoded data bits are separated onto different data symbols and sub-carrier signals, then error correction coding performance improves, but device complexity increases

Engineering Contradiction:
Improveerror correction coding performanceVSAvoiddata processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments LDPC encoded data bits and distributes them across multiple data symbols and sub-carrier signals. This segmentation strategy ensures that error correction coding performance is improved by separating coded bits that would otherwise be vulnerable to correlated fading and burst errors. The segmented distribution across time and frequency resources achieves better error correction while maintaining manageable processing complexity through systematic allocation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs multi-dimensional separation of LDPC encoded data bits across both time (different data symbols) and frequency (different sub-carrier signals) dimensions. This dimensional dispersion achieves superior error correction coding performance by ensuring that adjacent coded bits are widely separated in the transmitted signal, making them resilient to correlated fading. The systematic multi-dimensional distribution pattern manages processing complexity through regular, predictable allocation schemes.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP2056550B1Data processing apparatus and method
Publication Date: 2013.04.24 SONY GROUP CORP
  • EP2056550B1 patent drawingFigure 1
  • EP2056550B1 patent drawingFigure 2
  • EP2056550B1 patent drawingFigure 3

AI summary

A data processing apparatus is arranged in operation to recover data bits from data symbols received from a predetermined number of sub-carrier signals of Orthogonal Frequency Division Multiplexed (OFDM) symbols and to form an output bit stream. The predetermined number of sub-carrier signals of the OFDM symbols is determined in accordance with one of a plurality of operating modes. The data processing apparatus includes a symbol de-interleaver, a de-mapping unit, an inverse permuter and an LDPC decoder. The symbol de-interleaver recovers first sets of data symbols from first OFDM symbols in accordance with an odd-interleaving process and second sets of data symbols from second OFDM symbols in accordance with an even interleaving process, and forms an output symbol stream from the first and second sets of data symbols. The de-mapping unit generates from the data symbols of the output symbol stream parity interleaved Low Density Parity Check (LDPC) encoded data bits by converting each of the data symbols of the output symbol stream into data bits in accordance with a modulation scheme. The inverse permuter performs an inverse permutation process to effect a reverse of a permutation process applied to the parity interleaved LDPC encoded data bits to permute the LDPC encoded data bits and the LDPC decoder is adapted to perform LDPC decoding on the LDPC encoded data bits on which the inverse permutation process has been performed to form the output data bits. When in one of the plurality of operating modes in which the number of sub-carriers per OFDM symbol provides half or less than half a maximum number of sub-carriers in the OFDM symbols of any of the operating modes, the data processing apparatus is operable to de-interleave the data symbols for both first and second sets from the first and second OFDM symbols sets in accordance with the odd interleaving process. The data processing apparatus can therefore communicate data bits via OFDM symbols of, for example DVB-T2 or DVB-C2.