OFDM Demodulator Scattered Pilot Interpolation Memory Sharing
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Solution Overview
Problem
Existing OFDM demodulators face challenges in efficiently mounting multiple SP signal interpolation methods without increasing the LSI area, particularly in mobile reception environments where transmission path characteristics vary significantly.
Innovation Solution
An OFDM demodulator design that includes an FFT circuit, a scattered pilot signal extraction circuit, a carrier interpolation circuit, and a complex division circuit, along with memory and interface components, allows for efficient interpolation and filtering of SP signals in both time and frequency axes, enabling the use of multiple interpolation methods while minimizing memory usage and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple SP signal interpolation methods are mounted on a single OFDM demodulator to improve reception capability in various environments, then reception capability is improved, but the LSI area increases
Solution Approach 1:
The patent merges multiple SP signal interpolation methods into a unified structure where a single memory unit stores scattered pilot signals that are reused across different interpolation methods (time-axis interpolation, frequency-axis interpolation, and two-dimensional interpolation). This eliminates the need for separate memory units for each method, thereby reducing LSI area while maintaining the capability to support multiple interpolation approaches for improved reception in various environments.
Solution Approach 2:
The memory unit is designed with multi-functionality to serve all interpolation methods simultaneously. It stores scattered pilot signals that can be accessed and processed by different interpolation algorithms depending on the reception environment, making the memory universal rather than dedicated to a single method. This reduces overall memory requirements while maintaining adaptability to various reception conditions.
2Reliability
If multiple SP signal interpolation methods are mounted on a single OFDM demodulator to improve reception capability in various environments, then reception capability is improved, but power consumption increases
Solution Approach 1:
The patent combines multiple interpolation methods into a single integrated processing pipeline that shares common memory resources. By merging the signal storage and retrieval operations across different interpolation methods, the system reduces redundant memory access and processing operations, thereby lowering power consumption while maintaining support for multiple methods to improve reception capability.
Solution Approach 2:
The unified memory unit performs multiple functions by serving all interpolation methods from a single storage resource. This eliminates the need for separate memory access operations for each method, reducing overall power consumption while maintaining the ability to adapt to various reception environments through different interpolation approaches.
3Measurement precision
If transmission path characteristics are estimated by interpolating SP signal to improve accuracy, then estimation accuracy is improved, but device complexity increases
Solution Approach 1:
The patent segments the interpolation process into distinct functional stages: time-axis interpolation, frequency-axis interpolation, and two-dimensional interpolation. Each stage processes the scattered pilot signals in a specific dimension, allowing the complex estimation task to be broken down into manageable steps that can be implemented with simpler, modular circuitry while achieving high estimation accuracy.
Solution Approach 2:
The patent applies interpolation across multiple dimensions (time-axis and frequency-axis) to estimate transmission path characteristics. By extending the interpolation process from one dimension to two dimensions, the system achieves higher estimation accuracy without significantly increasing device complexity, as each dimensional interpolation can be implemented using similar processing structures.
Data Source
AI summary
An OFDM (Orthogonal Frequency Division Multiplexing) demodulator includes: an FFT (Fast Fourier Transform) circuit for performing a fast Fourier transform on an OFDM signal; a circuit for extracting an SP (Scattered Pilot) signal from the fast Fourier transformed signal; a circuit for adding a positive or negative sign to the extracted SP signal; a memory for temporarily storing the signed SP signal and an information transmission signal; a carrier interpolation circuit for performing time axis interpolation and frequency axis interpolation on the signed SP signal by a plurality of methods; a complex division circuit for performing a complex division of the information transmission signal by interpolated data; and a memory interface for detecting a timing a prescribed number of signed SP signals have been obtained and an output timing of the interpolated data according to the interpolation method.