DVB-T2 OFDM Interleaver Addressing for 0.5K Channel Estimation
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Solution Overview
Problem
The existing DVB-T and DVB-H standards lack a 0.5 k mode interleaver, which is necessary for more frequent channel estimation updates to accurately track time variations due to Doppler effects, and existing error correction coding schemes perform suboptimally in correlated fading environments.
Innovation Solution
A data processing apparatus with a linear feedback shift register and permutation circuit generates addresses for mapping input symbols onto OFDM sub-carrier signals, optimizing error correction by interleaving symbols across sub-carriers, and allowing flexible implementation across multiple modes (0.5 k, 1 k, 2 k, 4 k, 8 k, 16 k, and 32 k) by adjusting generator polynomials and permutation orders.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a 0.5 k mode interleaver is implemented, then channel estimation accuracy is improved, but device complexity increases
Solution Approach 1:
The address generator is designed to support multiple DVB-T2 modes (0.5k, 1k, 2k, 4k, 8k, 16k, 32k) through a unified architecture. By using configurable generator polynomials and permutation orders, a single device can adapt to different mode requirements, reducing overall system complexity while enabling 0.5k mode for improved channel estimation accuracy.
Solution Approach 2:
The interleaver implements mode flexibility by changing parameters such as generator polynomials and permutation orders based on the selected DVB-T2 mode. This allows the system to optimize channel estimation accuracy for 0.5k mode while maintaining compatibility with other modes, avoiding the need for separate hardware implementations.
2Reliability
If symbols are interleaved across sub-carriers, then error correction performance is improved, but processing complexity increases
Solution Approach 1:
The patent replaces complex mechanical or procedural interleaving methods with an address generator that uses linear feedback shift registers and permutation circuits. This substitution simplifies the processing architecture while achieving effective symbol interleaving across sub-carriers, improving error correction performance without proportionally increasing processing complexity.
3Adaptability or versatility
If multiple modes are supported, then adaptability is improved, but device complexity increases
Solution Approach 1:
The address generator is designed as a universal device that can operate in multiple DVB-T2 modes (0.5k, 1k, 2k, 4k, 8k, 16k, 32k) through configurable parameters. By implementing mode selection through parameter changes rather than separate hardware paths, the system achieves high adaptability while controlling implementation complexity.
Solution Approach 2:
Different DVB-T2 modes are supported by changing key parameters including generator polynomials, permutation orders, and address generation configurations. This parameter-based approach allows a single device implementation to provide multi-mode adaptability without requiring complex mode-specific hardware for each mode.
Data Source
AI summary
A data processing apparatus maps input symbols to be communicated onto a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol. The data processor includes an interleaver memory which reads-in the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals. The interleaver memory reads-out the data symbols on to the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on to the sub-carrier signals. The set of addresses are generated from an address generator which comprises a linear feedback shift register and a permutation circuit.