OFDM Interleaver Addressing for 8K DVB-T2 Error Correction
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Solution Overview
Problem
Existing OFDM systems, such as DVB-T and DVB-H, face challenges in error correction due to correlated fading in terrestrial broadcast channels, which can be mitigated by effectively interleaving data symbols across sub-carrier signals, but current interleaving schemes are not optimal, especially for the 8K mode, leading to inefficiencies in data communication.
Innovation Solution
A data processing apparatus with an interleaver memory and address generator using a linear feedback shift register and permutation circuit to generate addresses, which introduces an offset and cycles through different permutation codes for each OFDM symbol, ensuring that successive data bits are less likely to be mapped onto the same sub-carrier, thereby improving error correction efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed permutation code is used for address generation in the interleaver, then the device complexity is reduced, but the error correction performance deteriorates due to correlated fading affecting successive data bits mapped to the same sub-carrier
Solution Approach 1:
The patent applies dynamics by making the permutation code variable rather than fixed. The address generator dynamically selects different permutation codes from a predefined set for different OFDM symbols or data blocks, ensuring that successive data bits are mapped to different sub-carriers even when using the same base addressing scheme. This dynamic adaptation improves error correction performance without requiring a completely new interleaver structure.
Solution Approach 2:
The patent changes the parameter of the permutation code itself, selecting from multiple predefined permutation codes with different mapping characteristics. By varying this parameter across different symbols or blocks, the system achieves better dispersion of data bits across sub-carriers, mitigating the effects of correlated fading while using a manageable set of code options.
2Reliability
If different permutation codes are cycled through for each OFDM symbol, then the integrity of communicated data is improved by reducing mapping collisions, but the device complexity increases due to additional control logic
Solution Approach 1:
The patent implements periodic action by cycling through a predefined sequence of permutation codes for successive OFDM symbols. This periodic variation ensures that data bits are systematically dispersed across different sub-carrier mappings over time, improving data integrity through regular pattern changes that can be easily tracked and reversed at the receiver.
Solution Approach 2:
The patent applies preliminary action by pre-defining a set of permutation codes before transmission begins. These codes are prepared in advance and stored in the address generator, allowing the system to quickly switch between them during operation without requiring complex real-time generation or calculation, thus limiting the increase in device complexity.
3Reliability
If an offset is added to the address generation, then successive data bits are less likely to be mapped to the same sub-carrier, but the manufacturing precision requirements increase for address calculation
Solution Approach 1:
The patent changes the addressing parameter by adding an offset value to the base address calculation. This offset shifts the mapping position of data bits across sub-carriers, preventing systematic collisions where successive bits would otherwise map to the same sub-carrier. The offset can be varied to achieve different dispersion patterns while maintaining simple arithmetic operations.
Data Source
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AI summary
A data processing apparatus maps symbols received from a predetermined number of sub-carrier signals of Orthogonal Frequency Division Multiplexed (OFDM) symbols into an output symbol stream. The data processor includes an interleaver memory which reads-in the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals. The interleaver memory reads-out the data symbols on to the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on to the sub-carrier signals. The set of addresses are generated from an address generator which comprises a linear feedback shift register and a permutation circuit. The linear feedback shift register has twelve register stages with a generator polynomial for the linear feedback shift register of Riʹ11=Ri-1ʹ0⊕Ri-1ʹ1⊕Ri-1ʹ4⊕Ri-1ʹ6, and the permutation code forms, with an additional bit, a thirteen bit address. The address generator includes an offset generator operable to add an offset to the formed thirteen bit address, thereby providing an improvement in interleaving the data symbols for an 8K operating mode of an OFDM modulated system such as a Digital Video Broadcasting (DVB) standard such as DVB-Terrestrial2 (DVB-T2). This is because there is a reduced likelihood that successive data bits which are close in order in an input data stream are mapped onto the same sub-carrier of an OFDM symbol.