OFDM Interleaver Addressing for DVB-T2 8K Error Correction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing OFDM systems, such as DVB-T and DVB-H, face challenges in error correction due to correlated fading in terrestrial broadcast channels, which can be mitigated by effectively interleaving data symbols onto sub-carrier signals, but current interleaving schemes are not optimal, especially for the 8K mode of DVB-T2.
Innovation Solution
A data processing apparatus with an interleaver memory and address generator using a linear feedback shift register and permutation circuit, generating thirteen-bit addresses with a specific polynomial and permutation code, which changes for each OFDM symbol to reduce the likelihood of successive data bits being mapped to the same sub-carrier, employing an odd interleaving process to improve error correction efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a fixed permutation code is used for address generation in the interleaver, then the device complexity is reduced, but the error correction performance deteriorates due to correlated fading in terrestrial broadcast channels
Solution Approach 1:
The patent applies the dynamics principle by making the permutation code variable rather than fixed. The address generator uses different permutation codes for different OFDM symbols, specifically alternating between two permutation codes for consecutive symbols. This dynamic adjustment allows the system to better handle correlated fading in terrestrial broadcast channels, improving error correction performance without requiring a completely complex new system architecture.
Solution Approach 2:
The patent implements parameter changes by modifying the permutation code parameter in the address generation process. Instead of using a single fixed permutation code, the system changes the permutation code parameter between different OFDM symbols. This parameter variation ensures that successive data bits are mapped to different sub-carriers, breaking the correlation caused by fading and improving error correction coding performance.
2Reliability
If successive data bits are mapped to the same sub-carrier, then the mapping process is simplified, but the integrity of data communication deteriorates due to correlated fading
Solution Approach 1:
The system dynamically changes the permutation code used for address generation between different OFDM symbols. This dynamic approach ensures that successive data bits are distributed across different sub-carriers rather than being mapped to the same sub-carrier, thereby breaking the correlation caused by fading and improving data communication integrity.
Solution Approach 2:
The patent changes the permutation code parameter in the address generation process to prevent successive data bits from mapping to the same sub-carrier. By varying this parameter, the system achieves better distribution of data bits across sub-carriers, improving communication integrity without requiring overly complex address generation mechanisms.
3Reliability
If the permutation code changes for each OFDM symbol, then the error correction performance is improved, but the computational overhead increases
Solution Approach 1:
The patent applies dynamics by changing the permutation code for each OFDM symbol, which improves error correction coding performance by better distributing data bits across sub-carriers. However, this dynamic approach increases computational overhead compared to using a fixed permutation code.
Solution Approach 2:
The system uses periodic action by alternating between two permutation codes for consecutive OFDM symbols rather than using a completely unique code for each symbol. This periodic variation maintains the benefit of improved error correction performance while reducing computational overhead compared to using entirely different codes for every symbol.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A data processing apparatus maps input symbols to be communicated onto a predetermined number of sub-carrier signals of an Orthogonal Frequency Division Multiplexed (OFDM) symbol. The data processor includes an interleaver memory which reads-in the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals. The interleaver memory reads-out the data symbols on to the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on to the sub-carrier signals. The set of addresses are generated from an address generator which comprises a linear feedback shift register and a permutation circuit. The linear feedback shift register has twelve register stages with a generator polynomial for the linear feedback shift register of Riʹ11=Ri-1ʹ0⊕Ri-1ʹ1⊕Ri-1ʹ4⊕Ri-1ʹ6, and the permutation code forms, with an additional bit, a thirteen bit address. The address generator includes an offset generator operable to add an offset to the formed thirteen bit address, thereby providing an improvement in interleaving the data symbols for an 8K operating mode of an OFDM modulated system such as a Digital Video Broadcasting (DVB) standard such as DVB-Terrestrial2 (DVB-T2). This is because there is a reduced likelihood that successive data bits which are close in order in an input data stream are mapped onto the same sub-carrier of an OFDM symbol.