OFDM Interleaver Memory Layout for Multi-Mode Symbol Mapping

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Solution Overview

Problem

The Digital Video Broadcasting-Terrestrial (DVB-T) and DVB-H standards face challenges in providing an efficient implementation of an interleaver for various modes that maintains performance while reducing implementation costs, particularly in optimizing the mapping of data symbols onto Orthogonal Frequency Division Multiplexed (OFDM) sub-carrier signals.

Innovation Solution

A data processing apparatus that employs an odd interleaving process for both odd and even OFDM symbols, using a single interleaver memory and different permutation codes for successive OFDM symbols, allowing for efficient mapping and de-mapping of data symbols across multiple modes, including 2 k, 4 k, 8 k, 16 k, and 32 k modes, by writing and reading data symbols in specific orders defined by permutation codes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate interleavers are provided for each mode (2k, 8k, 4k), then interleaving performance is optimized for each mode, but device complexity and implementation cost increase

Engineering Contradiction:
Improveinterleaving performanceVSAvoidimplementation cost
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a universal interleaver that can operate in multiple modes (2k, 8k, 4k) by dynamically configuring the interleaver memory size and permutation patterns based on the selected mode. Instead of providing separate interleavers for each mode, a single interleaver structure is designed to adapt its parameters (memory size, permutation code) to match the requirements of different modes, thereby reducing device complexity while maintaining optimized interleaving performance for each mode

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Device complexity

If a single interleaver memory is used for all modes, then device complexity is reduced, but manufacturing precision and performance optimization for each mode become more difficult

Engineering Contradiction:
Improvememory requirementsVSAvoidperformance optimization
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent employs dynamic configuration of the interleaver memory, where the memory size and permutation patterns are adjusted based on the operating mode. The system can dynamically switch between different memory allocation schemes and permutation codes to optimize performance for the currently active mode, allowing a single memory structure to achieve mode-specific optimization without requiring separate dedicated memories for each mode

Inventive Principle:
Principle #15Dynamics

3Reliability

If mode-specific permutation codes are used for each mode, then interleaving quality is improved, but device complexity increases

Engineering Contradiction:
Improveinterleaving qualityVSAvoidpermutation circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent utilizes parameter changes in the permutation codes based on the operating mode. Different permutation patterns and codes are selected and applied according to the active mode (2k, 8k, or 4k), allowing the system to optimize interleaving quality for each mode while using a unified permutation circuit structure. The permutation circuit complexity is managed by selectively configuring parameters rather than implementing multiple dedicated circuits

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8737522B2Data processing apparatus and method for interleaving and deinterleaving data
Publication Date: 2014.05.27 SONY GROUP CORP
  • US8737522B2 patent drawing
  • US8737522B2 patent drawing
  • US8737522B2 patent drawing

AI summary

A data processing apparatus is arranged to map input data symbols to be communicated onto a predetermined number of sub-carrier signals of Orthogonal Frequency Division Multiplexed OFDM symbols. The predetermined number of sub-carrier signals is determined in accordance with one of a plurality of operating modes and the input data symbols are divided into first sets of input data symbols and second sets of input data symbols.