OFDM LDPC Interleaving for Burst-Error-Resistant Transmission
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing OFDM communication systems face challenges in improving error correction performance, particularly in channels with correlated fading and burst errors, where LDPC codes are susceptible to errors and erasures, leading to reduced decoding performance.
Innovation Solution
A data processing apparatus that combines a bit interleaver and a symbol interleaver to perform parity interleaving on LDPC-encoded data bits, using a stepwise-structured parity matrix to interleave parity bits and a permutation process to distribute code bits across OFDM symbols, thereby increasing resistance to burst errors and erasures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LDPC codes are used for error correction in OFDM communication, then error correction capability is improved, but susceptibility to burst errors and erasures in correlated fading channels worsens
Solution Approach 1:
The patent applies segmentation by dividing the LDPC code structure into information bits and parity bits, with the parity bits organized in a stepwise-structured parity matrix. This segmentation allows selective interleaving of parity bits to distribute burst errors across multiple check nodes, preventing simultaneous errors from overwhelming the decoding process.
Solution Approach 2:
The patent introduces a new dimension of protection by applying permutation processes that map code bits across different OFDM symbols and sub-carrier signals. This dimensional transformation spreads concentrated burst errors in the time-frequency domain across multiple dimensions, reducing their impact on any single decoding check node.
2Device complexity
If code bits are concentrated in specific positions for efficient encoding, then encoding complexity is reduced, but error propagation risk increases
Solution Approach 1:
The patent applies preliminary action by pre-organizing parity bits into a stepwise-structured parity matrix before the actual encoding process. This preliminary structuring enables efficient encoding while simultaneously preparing the code structure for error distribution, as the stepwise structure inherently facilitates the permutation processes needed to prevent error concentration.
Solution Approach 2:
The patent introduces permutation processes as intermediary steps between encoding and transmission. These permutation processes act as mediators that redistribute code bits across OFDM symbols and sub-carriers, preventing direct mapping of concentrated code bits to concentrated transmission positions, thereby reducing error propagation risk while maintaining encoding efficiency.
3Device complexity
If simple interleaving is used to reduce implementation complexity, then device complexity is reduced, but error correction performance in fading channels worsens
Solution Approach 1:
The patent segments the interleaving process into distinct components: parity bit interleaving based on the stepwise parity matrix structure, and permutation processes for mapping across OFDM symbols. This segmentation allows each component to be implemented independently with optimized complexity, while collectively achieving superior error correction performance in fading channels.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A data processing apparatus is arranged to communicate data bits via a predetermined number of sub-carrier signals of Orthogonal Frequency Division Multiplexed (OFDM) symbols. The predetermined number of sub-carrier signals is determined in accordance with one of a plurality of operating modes. The data processing apparatus comprises a parity interleaver operable to perform parity interleaving on Low Density Parity Check (LDPC) encoded data bits obtained by performing LDPC encoding according to a parity check matrix of an LDPC code, the parity check matrix including a parity matrix corresponding to parity bits of the LDPC code, the parity matrix having a stepwise structure, so that a parity bit of the LDPC encoded data bits is interleaved to a different parity bit position. A mapping unit maps the parity interleaved bits onto data symbols corresponding to modulation symbols of a modulation scheme of the OFDM sub-carrier signals. A symbol interleaver is arranged in operation to perform an odd interleaving process which interleaves first sets of data symbols on to the sub-carrier signals of first OFDM symbols and an even interleaving process which interleaves second sets of data symbols on to the sub-carrier signals of second OFDM symbols. However, when the modulation mode is a mode which includes half or less than half a number of sub-carrier signals than a total number of sub-carriers in the OFDM symbols for carrying the data symbols that can be accommodated by the interleaver memory, the data processing apparatus is operable to interleave the data symbols from both first and second sets in accordance with the odd interleaving process on to the first and second OFDM symbols. The data processing apparatus can therefore communicate data bits via OFDM symbols of, for example DVB-T2 or DVB-C2.