OFDM Memory-Bank Interleaving Without Extra Cyclic Memory
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Solution Overview
Problem
Existing interleaving methods require additional memories and reduce processing speed due to the need for additional cyclic interleaving, which is inefficient in data transmission systems.
Innovation Solution
A method and system that perform cyclic interleaving without additional memories by mathematically determining the readout order of data from symbol-interleaved banks using predetermined calculation processes for write and read address values, incorporating symbol, tone, and cyclic interleaving techniques.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If additional cyclic interleaving is performed using conventional methods, then data transmission integrity is improved, but additional memories are required and processing speed is reduced
Solution Approach 1:
The patent combines symbol interleaving and cyclic interleaving into a single unified interleaving process. By integrating these two functions into one memory structure with unified addressing, the system eliminates the need for separate cyclic interleaving memory while maintaining both interleaving effects, thus reducing memory requirements and device complexity.
Solution Approach 2:
The single memory structure serves multiple functions: it performs both symbol interleaving and cyclic interleaving operations. The unified addressing scheme allows the same memory to handle different interleaving patterns through mathematical address calculations, making the memory universal and eliminating redundant memory components.
2Reliability
If additional cyclic interleaving is performed using conventional methods, then data transmission integrity is improved, but processing speed is reduced
Solution Approach 1:
The patent performs cyclic interleaving patterns in advance during the write operation to the single memory. By pre-calculating and storing data in the cyclically interleaved pattern within the unified memory structure, the system eliminates the need for a separate post-write cyclic interleaving step, thereby improving processing speed while maintaining data transmission integrity.
3Reliability
If symbol interleaving is performed using multiple data banks, then burst errors are distributed, but additional memory structures are required
Solution Approach 1:
The patent divides the single memory into multiple data banks (N banks) for symbol interleaving. Each bank stores a portion of the interleaved data, and the segmentation is achieved through mathematical address calculations that distribute data across banks. This approach maintains error correction capability while using a single unified memory structure rather than multiple separate memory devices.
Data Source
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Figure 3A~3C
Figure 4A
AI summary
An interleaving method employing symbol interleaving, tone interleaving, and cyclic interleaving for transmitting data includes storing data at write address values in a memory which are sequentially calculated according to a predetermined process, and reading data stored at read address values of the memory which are sequentially calculated according to a predetermined process, wherein the memory has N data banks, each data bank has M storage spaces, and there are D interleaving target data having data numbers A, and the storing data operation includes storing the data at storage spaces of the data banks, the storage spaces corresponding to integer values and the data banks corresponding to remainders obtained by dividing the data numbers A by results of dividing a total number of data D by the number of storage spaces M.