OFDM Symbol Interleaving With LFSR Addressing for DVB-T2
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Solution Overview
Problem
DVB-T2 communication systems face challenges in improving data integrity due to correlated fading in terrestrial broadcast channels, which affects the performance of error correction coding schemes, particularly in separating encoded symbols across OFDM sub-carrier signals.
Innovation Solution
A symbol interleaver is implemented using a permutation code and generator polynomial, allowing for optimal mapping of data symbols onto OFDM sub-carrier signals, with an address generator that generates write and read addresses to shuffle input data cells for interleaving, and its reverse operation in the receiver for de-interleaving, adaptable across different modes like 1k, 2k, 4k, 8k, 16k, and 32k.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If encoded symbols are mapped directly onto OFDM sub-carrier signals without interleaving, then the mapping process is simple and fast, but error correction performance deteriorates due to correlated fading in terrestrial broadcast channels
Solution Approach 1:
The encoded symbol stream is divided into multiple groups that are mapped onto different OFDM symbol groups. Each group is further segmented into sub-carriers, allowing error correction codes to protect against correlated fading by distributing symbols across independent fading regions in both time and frequency domains
Solution Approach 2:
The interleaving process extends from traditional one-dimensional frequency-domain permutation to two-dimensional mapping across time (OFDM symbols) and frequency (sub-carriers). This dimensional expansion allows symbols to be separated not only across sub-carriers but also across different time instances, providing robustness against time-correlated fading
2Reliability
If symbols are separated across different sub-carrier signals by large distances, then error correction coding performance improves, but the distance between adjacent sub-carriers at interleaver output increases
Solution Approach 1:
Different regions of the frequency spectrum are assigned different interleaving patterns optimized for local channel characteristics. The mapping arrangement adapts the separation distance between symbols based on local fading conditions, ensuring adequate separation in high-fading regions while maintaining tighter packing in stable regions
3Reliability
If an interleaver memory and address generator are implemented, then symbol interleaving for error correction is achieved, but the device complexity and processing overhead increase
Solution Approach 1:
The interleaver memory and address generator are designed to support multiple DVB standards (DVB-T, DVB-H, DVB-T2) and various modes (2k, 4k, 8k) through configurable parameters. This universal design allows a single implementation to provide symbol separation functionality across different communication standards, reducing overall system complexity
Solution Approach 2:
The interleaving parameters such as memory size, address generation polynomials, and mapping patterns are made configurable based on the operating mode and channel conditions. This allows the system to optimize the balance between symbol separation effectiveness and processing complexity by adjusting parameters like the interleaver depth and permutation patterns
Data Source
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AI summary
A data processing apparatus maps symbols received from a predetermined number of sub-carrier signals of Orthogonal Frequency Division Multiplexed (OFDM) symbols into an output symbol stream. The data processor includes an interleaver memory which reads-in the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals. The interleaver memory reads-out the data symbols on to the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on to the sub-carrier signals. The set of addresses are generated from an address generator which comprises a linear feedback shift register and a permutation circuit. The linear feedback shift register has twelve register stages with a generator polynomial for the linear feedback shift register of Riʹ11=Ri−1ʹ0⊕Ri−1ʹ1⊕Ri−1ʹ4⊕Ri−1ʹ6, and the permutation code forms, with an additional bit, a thirteen bit address. The permutation code is changed from one OFDM symbol to another, thereby providing an improvement in interleaving the data symbols for an 8K operating mode of an OFDM modulated system such as a Digital Video Broadcasting (DVB) standard such as DVB-Terrestrial2 (DVB-T2). This is because there is a reduced likelihood that successive data bits which are close in order in an input data stream are mapped onto the same sub-carrier of an OFDM symbol.