OFDM Symbol Interleaving With LFSR Address Permutation

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Solution Overview

Problem

Existing OFDM systems, such as DVB-T and DVB-H, face challenges in error correction due to correlated fading in terrestrial broadcast channels, which can be mitigated by improved symbol interleaving, but current interleaving schemes are inefficient, especially for even OFDM symbols and require significant memory resources.

Innovation Solution

A data processing apparatus with a de-interleaver and address generator using a linear feedback shift register and permutation circuit to generate pseudo-random addresses, which changes permutation codes for each OFDM symbol, optimizing the interleaving process to reduce the likelihood of consecutive data bits mapping to the same sub-carrier, and utilizing an odd interleaving process to minimize memory requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional symbol interleaving schemes are used in OFDM systems, then error correction can be performed, but the interleaving process is inefficient and requires significant memory resources

Engineering Contradiction:
Improveerror correction efficiencyVSAvoidmemory resources
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the interleaving process into two distinct parts: an odd interleaving process for odd-numbered OFDM symbols and a simple identity mapping for even-numbered symbols. This segmentation allows the system to apply complex interleving only where needed (odd symbols) while using a trivial process for even symbols, thereby reducing overall memory requirements and computational complexity while maintaining error correction effectiveness

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic permutation codes that change for each OFDM symbol based on the symbol index and cell ID. The permutation pattern is dynamically adjusted using a pseudo-random sequence generator, allowing the interleaving strategy to adapt to different transmission conditions and symbol positions, which improves error correction efficiency without requiring static large memory buffers

Inventive Principle:
Principle #15Dynamics

2Reliability

If conventional interleaving schemes are used, then data symbols can be mapped onto sub-carriers, but consecutive data bits are likely to map to the same sub-carrier reducing error correction performance

Engineering Contradiction:
Improveerror correction performanceVSAvoidinterleaving efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent employs periodic permutation codes that cycle through different patterns for successive OFDM symbols. The permutation code for symbol n is determined by a periodic function of n, ensuring that consecutive data bits are distributed across different sub-carriers in a periodic manner. This periodic variation prevents systematic mapping patterns that would cause consecutive bits to land on the same sub-carrier, thereby improving error correction performance

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent introduces a pseudo-random sequence generator as an intermediary between the data symbols and the sub-carrier mapping process. This intermediary transforms the sequential data input into a permuted sequence that distributes consecutive bits across widely separated sub-carriers. The permutation circuit acts as a mediator that breaks the direct sequential mapping relationship, improving the randomness and distribution of bit-to-subcarrier assignment

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP2056473B1Data processing apparatus and method
Publication Date: 2019.05.08 SATURN LICENSING LLC
  • EP2056473B1 patent drawingFigure 1
  • EP2056473B1 patent drawingFigure 2
  • EP2056473B1 patent drawingFigure 3

AI summary

A data processing apparatus maps symbols received from a predetermined number of sub-carrier signals of Orthogonal Frequency Division Multiplexed (OFDM) symbols into an output symbol stream. The data processor includes an interleaver memory which reads-in the predetermined number of data symbols for mapping onto the OFDM sub-carrier signals. The interleaver memory reads-out the data symbols on to the OFDM sub-carriers to effect the mapping, the read-out being in a different order than the read-in, the order being determined from a set of addresses, with the effect that the data symbols are interleaved on to the sub-carrier signals. The set of addresses are generated from an address generator which comprises a linear feedback shift register and a permutation circuit. The linear feedback shift register has twelve register stages with a generator polynomial for the linear feedback shift register of Riʹ11=Ri-1ʹ0⊕Ri-1ʹ1⊕Ri-1ʹ4⊕Ri-1ʹ6, and the permutation code forms, with an additional bit, a thirteen bit address. The permutation code is changed from one OFDM symbol to another, thereby providing an improvement in interleaving the data symbols for an 8K operating mode of an OFDM modulated system such as a Digital Video Broadcasting (DVB) standard such as DVB-Terrestria12 (DVB-T2). This is because there is a reduced likelihood that successive data bits which are close in order in an input data stream are mapped onto the same sub-carrier of an OFDM symbol.