OFDM Symbol Interleaving With Valid Address Control
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Solution Overview
Problem
Existing OFDM systems face challenges in efficiently adapting to varying numbers of sub-carriers per symbol, leading to increased memory requirements and complexity, which hinders flexible data communication and increases costs.
Innovation Solution
A data processing apparatus with an address generator, interleaver memory, and controller that implements an odd-even interleaving process, allowing for flexible mapping of data symbols onto OFDM sub-carriers while minimizing memory usage by determining valid addresses for each symbol, enabling efficient communication with varying sub-carrier counts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of sub-carriers per OFDM symbol is made variable to enhance flexibility in data communication, then adaptability is improved, but memory requirements and device complexity increase
Solution Approach 1:
The patent implements dynamic adaptation to variable sub-carrier counts by using a controller that determines valid address ranges based on the actual number of sub-carriers in each OFDM symbol. The address generator dynamically adjusts the interleaving process to match the current symbol's sub-carrier configuration, allowing the system to adapt flexibly without requiring maximum-sized memory buffers for all possible configurations.
Solution Approach 2:
The system changes the parameter of address generation to accommodate varying sub-carrier counts. By modifying the valid address range parameter based on the actual number of sub-carriers available in each symbol, the system achieves flexibility without proportionally increasing memory requirements, as the memory is accessed only within the valid range corresponding to the current configuration.
2Manufacturing precision
If addresses are generated for each data symbol to map onto sub-carrier signals, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The address generator is designed to handle multiple OFDM modes (2k, 8k, and variable sub-carrier configurations) using a single unified device. The controller determines the appropriate address generation parameters based on the current mode, allowing the same hardware to achieve precise mapping across different configurations without requiring separate address generators for each mode.
Solution Approach 2:
The address generation process uses parameter changes to adapt to different sub-carrier configurations. The controller modifies the valid address range and interleaving parameters based on the detected number of sub-carriers, enabling the address generator to maintain manufacturing precision across varying modes without increasing inherent device complexity.
3Adaptability or versatility
If the interleaver memory size is increased to accommodate varying sub-carrier counts, then adaptability is improved, but loss of substance increases
Solution Approach 1:
The system uses dynamic address validation to optimize memory utilization. The controller determines the valid address range based on the actual number of sub-carriers in each OFDM symbol, ensuring that memory resources are allocated and accessed only as needed for the current configuration. This dynamic approach allows the system to accommodate varying sub-carrier counts without permanently allocating maximum-sized memory buffers.
Solution Approach 2:
The patent applies partial action by generating and validating only the addresses that are actually needed for the current sub-carrier configuration. Rather than pre-configuring all possible addresses, the system generates addresses within the valid range corresponding to the actual number of sub-carriers, reducing unnecessary memory operations and improving resource utilization efficiency.
Data Source
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AI summary
A data processing apparatus is operable to map data symbols received from sub-carrier signals of Orthogonal Frequency Division Multiplexed (OFDM) symbols into an output data stream. The data processing apparatus includes an address generator, an interleaver memory and a controller. The controller is operable, when operating in accordance with an even interleaving process to read out from the interleaver memory a first set of the data symbols into the output data stream using addresses generated by the address generator, to write into the interleaver memory a second set of the data symbols received from the sub-carrier signals of an even OFDM symbol using the addresses generated by the address generator. The controller is operable in accordance with an odd interleaving process, to read out from the interleaver memory a first set of the data symbols into the output data stream using read addresses determined in accordance with a sequential order of the first set of data symbols, and to write into the interleaver memory a second set of the data symbols received from the sub-carrier signals of an odd OFDM symbol at write addresses determined in accordance with a sequential order of the first set of input data symbols, such that while data symbols from the first set are being read from locations in the interleaver memory, input data symbols from the second set can be written to the locations just read from. The number of the sub-carriers which are available from a previous OFDM symbol is different from the number of the sub-carriers which are available from a current OFDM symbol, and the controller is operable to determine before reading out the first data symbols from the interleaver memory, whether the read address is valid for the previous OFDM symbol, and to determine before writing the second data symbols into the interleaver memory, whether the write address is valid for the current OFDM symbol. Application can be found with DVB Cable 2, which can provide substantially four thousand carriers.