OFEC Interleaver Buffer Layout for Burst Error Dispersion

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Solution Overview

Problem

Communication systems face challenges in correcting errors caused by interference, particularly burst errors, which conventional modulation schemes and error correction codes struggle to address effectively, leading to data corruption and decoding failures.

Innovation Solution

The implementation of an interleaver and deinterleaver system that reorders data bits across a communication link, distributing error bursts over a longer period to facilitate error correction, using a buffer organized into subsets and columns to balance symbol bits in each reliability class, thereby enhancing the system's tolerance to long bursts of errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional error correction codes are used, then decoding is simplified, but the system cannot effectively correct burst errors caused by interference

Engineering Contradiction:
Improveerror correction capabilityVSAvoidburst error susceptibility
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent divides the data stream into individual data units and separates them using an interleaver buffer. Each data unit is assigned to a different time slot or position in the buffer, so that burst errors affecting continuous transmission are distributed across multiple separate data units rather than concentrating on one unit. This segmentation allows conventional error correction codes to effectively handle the dispersed errors.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary interleaving before transmission and deinterleaving after reception. The interleaver reorders data units in advance according to a specific pattern (e.g., column-by-column filling and row-by-row reading), so that when burst errors occur during transmission, they affect different original data units. The deinterleaver then restores the original order, concentrating errors back to their source positions where error correction can be applied.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If data is transmitted without reordering, then transmission speed is maintained, but error bursts cause data corruption and decoding failures

Engineering Contradiction:
Improvetransmission speedVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The interleaver buffer segments the continuous data stream into discrete data units that can be independently processed. By organizing data into a buffer structure with multiple rows and columns, the system can reorder units without creating long delays, maintaining transmission throughput while improving error resilience.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The interleaver buffer acts as an intermediary between the data source and the transmission channel. It temporarily stores and reorders data units, introducing a controlled delay that spreads error exposure over time without significantly impacting overall transmission speed. This intermediary structure enables error distribution while preserving data flow.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentEP4207607A1Interleaver for open FEC (OFEC)
Publication Date: 2023.07.05 ACACIA COMMUNICATIONS INC
  • EP4207607A1 patent drawingFigure 1A~1C
  • EP4207607A1 patent drawingFigure 2
  • EP4207607A1 patent drawingFigure 3

AI summary

The present application concerns an interleaver suitable for optical transmission in the framework of e.g. Open ROADM, G.703.9 and P2PCO Physical Layer 2.0. The interleaver buffer (1140) size is 172,032 bits, wherein the buffer is organized as an (84, 8) array of 16 x 16 bit blocks which is separated into 4 subsets. The interleaver performs intra-block interleaving and inter-block interleaving. Intra-block interleaving reorders the bits in each 16x 16 block output by the OFEC FEC encoders (1110, 1120) to ensure that the bits in each row and column of a block at the encoder output are remapped almost uniformly in the block for transmission on the transmission line and is performed during writing the data into the buffer (1130). Inter-block interleaving attempts to have nearby symbols on the transmission line containing bits that are widely separated in the encoder output. Inter-block interleaving is carried out when reading out the buffer column-by-column from alternating subsets.