Off-axis Silicon Photovoltaics Integration with III-V Materials

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Solution Overview

Problem

Current techniques for integrating III-V materials with silicon-on-insulator (SOI) substrates are complicated and require complex processes like epitaxial growth, double transfer, and handling layers, making it difficult to simplify wafer handling and improve yield.

Innovation Solution

The approach involves direct wafer bonding of off-axis, doped silicon regions with a predetermined non-zero lattice orientation to facilitate the growth of III-V materials without the need for epitaxial growth on SOI substrates, using techniques like SmartCut for layer release and heteroepitaxy on sapphire substrates for integration with silicon and GaN.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If epitaxial growth is used on silicon-on-insulator (SOI) substrate, then III-V materials can be integrated with silicon electronics, but the process becomes complicated and yield decreases

Engineering Contradiction:
Improveintegration capabilityVSAvoidprocess complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts the insulator layer from the SOI substrate, using only the silicon substrate portion. This eliminates the need for complex epitaxial growth on SOI while maintaining the ability to integrate III-V materials with silicon electronics through direct wafer bonding of off-cut silicon layers

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the substrate parameter from SOI (silicon-on-insulator) to off-cut silicon substrate. This parameter change simplifies the integration process by eliminating the insulator layer requirement while maintaining compatibility with silicon electronics through controlled lattice orientation

Inventive Principle:
Principle #35Parameter changes

2Productivity

If direct wafer bonding of off-axis silicon layers is used, then wafer handling is simplified and yield improves, but lattice orientation control becomes critical

Engineering Contradiction:
ImproveyieldVSAvoidlattice orientation precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent performs preliminary preparation of off-cut silicon layers with predetermined lattice orientations before bonding. This preliminary action ensures that the lattice orientation is controlled in advance, simplifying the subsequent bonding process while maintaining high precision requirements

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent uses off-cut silicon layers as an intermediary between the substrate and III-V materials. These intermediary layers provide the necessary lattice orientation control while enabling simplified direct bonding, thus mediating between the precision requirements and the simplified handling process

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method simplifies wafer handling, eliminates the need for complex epitaxial growth on SOI substrates, and improves yield by allowing direct growth of III-V materials on off-cut silicon layers, enabling easier integration with silicon electronics and reducing the complexity of wafer bonding processes.

Implementation Method 1

Photovoltaics (PV) refers to conversion of light into electric current via semiconducting materials exhibiting the photovoltaic effect

Methodology Applied
Scientific EffectPhotovoltaic effect: Photovoltaic Effect

Implementation Method 2

techniques like SmartCut for layer release and heteroepitaxy on sapphire substrates for integration with silicon and GaN

Methodology Applied
Scientific EffectHeteroepitaxy: Epitaxy

Implementation Method 3

direct wafer bonding of off-axis, doped silicon regions with a predetermined non-zero lattice orientation

Methodology Applied
Scientific EffectDirect wafer bonding: Welding

Data Source

PatentUS11677039B2Vertical silicon and III-V photovoltaics integration with silicon electronics
Publication Date: 2023.06.13 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US11677039B2 patent drawing
  • US11677039B2 patent drawing
  • US11677039B2 patent drawing

AI summary

A photovoltaic structure includes a substrate; and a plurality of off-axis, doped silicon regions outward of the substrate. The plurality of off-axis, doped silicon regions have an off-axis lattice orientation at a predetermined non-zero angle. A plurality of photovoltaic devices of a first chemistry are located outward of the plurality of off-axis, doped silicon regions. Optionally, a plurality of photovoltaic devices of a second chemistry, different than the first chemistry, are located outward of the substrate and are spaced away from the plurality of off-axis, doped silicon regions.