Off-Chip Driver Impedance Testing Without Direct TSV Probing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Testing the impedance of off-chip drivers with through-silicon vias is challenging due to the difficulty in probing TSVs as their diameter decreases and pitch tightens, and direct testing can introduce large metal capacitance, complicating the measurement process.
Innovation Solution
A testing circuit and method that utilize input buffers to compare reference voltages with voltages at the TSVs, minimizing capacitance introduction, by including pre-drivers, pass gates, and scan chains to determine impedance without direct attachment to TSVs, allowing for concurrent testing of multiple off-chip drivers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If direct probing of TSV is performed to test impedance, then measurement can be obtained, but probing becomes increasingly difficult as TSV diameter decreases and pitch tightens
Solution Approach 1:
The patent introduces an intermediary testing circuit that includes pre-drivers, pass gates, and scan chains as mediators between the test equipment and the TSV. Instead of directly probing the TSV, the test signal is routed through these intermediary components that are easier to access and manipulate, thereby solving the probing difficulty while still enabling impedance measurement of the TSV.
Solution Approach 2:
The patent creates a testing circuit that replicates the electrical characteristics of the TSV environment without requiring physical access to the TSV itself. The pre-drivers and buffer circuits create an electrical copy or model of the TSV interface, allowing impedance measurement through easier-to-access test pads while maintaining measurement accuracy.
2Reliability
If test pad is attached directly to TSV to test OCD, then testing can be performed, but large metal capacitance is introduced to the OCD circuit
Solution Approach 1:
The testing circuit uses intermediary components (pre-drivers, pass gates, buffer circuits) that are electrically isolated from the OCD circuit through the TSV. These intermediaries act as buffers that prevent the large metal capacitance of test pads from being directly coupled to the OCD circuit, thereby enabling reliable testing without introducing harmful capacitance effects.
Solution Approach 2:
The testing architecture segments the measurement system into distinct isolated sections: the OCD circuit under test, the TSV interconnect, and the testing circuit with test pads. This segmentation through the TSV barrier allows independent optimization of each section, enabling the use of large test pads in the testing circuit without affecting the OCD circuit's electrical characteristics.
3Measurement precision
If conventional probing methods are used for TSV, then impedance testing is possible, but the process becomes complicated and time-consuming
Solution Approach 1:
The patent merges multiple testing functions into a single integrated testing circuit that can test multiple OCDs simultaneously. The scan chain architecture allows sequential access to multiple TSVs and OCDs through a unified test interface, combining what would otherwise require multiple separate probing operations into one efficient testing process, thereby improving productivity while maintaining measurement precision.
Data Source
AI summary
A testing circuit for verifying the impedance of off-chip drivers includes: a plurality of off-chip drivers (OCD), each off-chip driver including a through-silicon via (TSV); an IREF test pad, for driving a current to the plurality of off-chip drivers; a plurality of pre-drivers, each respective pre-driver coupled to one of the plurality of off-chip drivers, wherein the plurality of pre-drivers are configured to turn on the off-chip drivers; a VREF test pad, for inputting a reference voltage to the testing circuit; a plurality of input buffers (IB) for outputting a plurality of comparison results, each of the plurality of input buffers configured to output the plurality of comparison results according to the reference voltage and the voltage at the TSV nodes; and a test pad, coupled to the plurality of IBs, for receiving the comparison results to determine whether the impedance of each OCD is within a desired range.