Off-Chip Instruction Verification With Hash Tables and Digital Signatures

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Solution Overview

Problem

Existing methods for securely executing computer-readable instructions face challenges due to the high cost and limited capacity of on-chip memory, which restricts the execution of larger software applications, and existing off-chip execution methods lack robust security against tampering.

Innovation Solution

A system that stores verification data in on-chip memory, using a hash table and digital signatures, dynamically swaps and verifies pages from off-chip storage, and employs secure hashing to ensure authenticity, allowing execution of larger software images without extending trust beyond chip boundaries.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If computer-readable instructions are stored in on-chip memory for secure execution, then security is improved, but cost and die size increase

Engineering Contradiction:
ImprovesecurityVSAvoiddie size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The software image is divided into multiple pages that can be selectively loaded into on-chip memory. Only the currently needed page is stored in on-chip memory while other pages remain in off-chip storage, reducing the required on-chip memory size while maintaining security through verification of loaded pages.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The verification data (hash values) are extracted and stored in on-chip memory, while the bulk software image pages are kept in off-chip storage. This separation allows secure verification with minimal on-chip memory requirements.

Inventive Principle:
Principle #2Taking out (Extraction)

2Quantity of substance

If more on-chip memory is allocated to store larger software images, then software capacity is improved, but cost increases

Engineering Contradiction:
Improvesoftware capacityVSAvoidcost
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The software image is segmented into pages that are loaded on-demand into on-chip memory. This allows the system to execute larger software images than the on-chip memory capacity by swapping pages in and out, avoiding the need to increase on-chip memory size and associated costs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically loads and unloads software pages based on execution needs. Pages are loaded into on-chip memory when needed and can be swapped out when no longer required, enabling flexible execution of large software images with limited on-chip memory resources.

Inventive Principle:
Principle #15Dynamics

3Ease of manufacture

If off-chip storage is used to store software images, then cost is reduced, but security against tampering deteriorates

Engineering Contradiction:
ImprovecostVSAvoidsecurity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Hash values of all software pages are pre-calculated and stored in on-chip memory before execution. When a page is loaded from off-chip storage, its hash is immediately verified against the pre-stored expected hash value, detecting any tampering before the page is executed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a verification feedback mechanism where each loaded page undergoes hash verification. If verification fails (indicating tampering), the system can take corrective action such as halting execution or reloading the page, providing security feedback without requiring the entire software image to be in secure on-chip memory.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250272251A1Verification of off-chip computer-readable instructions and related systems, methods, and apparatuses
Publication Date: 2025.08.28 MICROCHIP TECHNOLOGY INC
  • US20250272251A1 patent drawing
  • US20250272251A1 patent drawing
  • US20250272251A1 patent drawing

AI summary

An apparatus may comprise an off-chip data storage device and a semiconductor device package including processing circuitry and an on-chip memory device, the off-chip data storage device including master data and portions of the computer-readable instructions. The processing circuitry may retrieve a master data that includes a digital signature that may be used to verify the master data and a hash table that may include hash information for others of the portions. The processing circuitry may also verify the master instructions responsive to the digital signature, retrieve a portion, calculate a hash value of the retrieved portion, and determine whether the calculated hash value correlates to hash information of the hash table.