Hardware Offload Card Architecture for Low-Latency Storage I/O
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Solution Overview
Problem
Traditional local storage technologies face inefficiencies due to high CPU resource occupation and time delays in IO task processing, and pure software schemes fail to optimize data transmission efficiency across different device types.
Innovation Solution
A storage system with a hardware offload card that processes storage tasks via a programmable system on chip and dedicated hardware, enabling peer-to-peer connections with storage devices, and employs software and hardware collaboration to identify and execute tasks efficiently, abstracting physical resources into virtual devices, and using DMA for direct data access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional local storage technology is used, then storage capacity is provided, but CPU resources are heavily occupied and IO time delay increases
Solution Approach 1:
The patent segments the storage system into distinct functional modules: host, hardware offload card, and storage device. The hardware offload card is further divided into a programmable system on chip for software subtasks and dedicated hardware for hardware subtasks. This segmentation allows IO task processing to be distributed across multiple components, reducing the CPU burden on the host and enabling parallel processing to decrease IO time delay.
Solution Approach 2:
The hardware offload card serves as an intermediary component between the host and the storage device. It receives storage tasks from the host, processes them through its programmable and dedicated hardware components, and manages data transmission to the storage device. This intermediary architecture offloads processing from the host CPU and optimizes the data path, thereby improving IO efficiency and reducing time delay.
2Adaptability or versatility
If pure software schemes are used, then implementation flexibility is achieved, but data transmission efficiency is reduced for large data transmissions
Solution Approach 1:
The patent merges software and hardware approaches into a hybrid architecture. The programmable system on chip provides software-level flexibility for handling different storage tasks and protocols, while the dedicated hardware components provide hardware-level performance for data-intensive operations. This combination allows the system to maintain implementation flexibility while achieving high data transmission efficiency through hardware-accelerated paths for large data transmissions.
Data Source
AI summary
Embodiments of the present application provide a storage system and method, and a hardware offload card, where the storage system includes a hardware offload card and a storage device, where the hardware offload card and the storage device are connected to a host in a peer-to-peer manner; the hardware offload card is configured to receive a storage task from the host, execute the storage task, and send a data access request corresponding to the storage task to the storage device; the storage device is configured to transmit storage data corresponding to the data access request based on a transmission channel between the host and the storage device.