Offload Processor Modules for Full Bandwidth Packet Handling

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Conventional data center server systems with tree-like topologies face traffic slowdowns and computational bottlenecks due to high network latency and the need for frequent upgrades of expensive Top-Of-Rack (TOR) switches, which are costly and inefficient in handling variable network packet flows.

Innovation Solution

Implementing a rack server system with offload processor modules connected via a memory bus, allowing direct inter-server communication and eliminating the need for TOR switches by using offload processor modules as virtual switches that can process network packets efficiently and handle traffic management, thereby reducing latency and increasing bandwidth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If all servers communicate through TOR switches in a tree-like topology, then network connectivity is provided, but network latency increases and traffic slowdowns occur during high usage periods

Engineering Contradiction:

Improvenetwork data transfer speedVSAvoidnetwork latency

Core Design Contradiction:

SpeedVSLoss of time

Solution Approach 1:

The patent segments the centralized TOR switching function into distributed offload processors embedded in each server. Instead of all traffic funnealing through centralized TOR switches, each server has local offload processors that can handle packet processing independently, segmenting the traffic flow path and eliminating the bottleneck at the TOR switch level.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The patent introduces a new dimension of communication by enabling direct peer-to-peer connections between servers through offload processors. This bypasses the traditional two-hop path (server→TOR switch→server) and creates a direct communication channel, effectively adding a shortcut dimension to the network topology.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Productivity

If TOR switches are used to handle all network traffic, then network packet routing is provided, but computational bottlenecks occur during high usage periods

Engineering Contradiction:

Improvepacket processing throughputVSAvoidcomputational capacity

Core Design Contradiction:

ProductivityVSPower

Solution Approach 1:

Each server's offload processors handle their own packet processing needs locally without requiring external computational resources. The offload processors autonomously manage packet routing, filtering, and processing tasks that would otherwise burden the TOR switches, enabling self-service packet handling at each server node.

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent merges the functions of TOR switches and server processing units by integrating offload processors directly into server hardware. This combination consolidates packet processing capabilities at the server level, eliminating the need for separate TOR switching infrastructure and distributing computational load across multiple servers simultaneously.

Inventive Principle:

Principle #5Merging (Combining)

3Speed

If TOR switches are upgraded to accommodate higher network speeds, then network capacity increases, but system cost increases and frequent replacements are needed

Engineering Contradiction:

Improvenetwork speed capacityVSAvoidsystem cost

Core Design Contradiction:

SpeedVSQuantity of substance

Solution Approach 1:

Instead of investing in expensive, high-capacity TOR switches that require periodic upgrades, the patent uses multiple lower-cost offload processors distributed across servers. These offload processors can be individually replaced or upgraded without replacing entire TOR switch infrastructure, reducing overall system cost and extending upgrade cycles.

Inventive Principle:

Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The offload processors are designed with multi-functionality, handling packet routing, filtering, processing, and inter-server communication tasks that would traditionally require separate TOR switching equipment. This universal functionality eliminates the need for dedicated TOR switches and reduces overall system component count and cost.

Inventive Principle:

Principle #6Universality (Multi-functionality)

4Loss of time

If direct inter-server connections are implemented without TOR switches, then network latency is reduced, but network packet routing capability must be distributed

Engineering Contradiction:

Improvenetwork latencyVSAvoiddistributed routing complexity

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

The offload processors serve as intermediary components between the host processor and the network interface, as well as between directly connected servers. They handle the complex packet routing, filtering, and protocol processing tasks, allowing simple direct connections between servers while maintaining sophisticated routing capabilities through the intermediary offload processors.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9378161B1Full bandwidth packet handling with server systems including offload processors

Publication Date: 2016.06.28 XOCKETS INC

AI summary

A rack server system for a packet processing is disclosed. The system can include a plurality of servers mountable in a rack; a top of rack (TOR) unit having connections to each of the servers; and a plurality of offload processor modules, each offload processor module having at least one input-output (IO) port and multiple offload processors, including at least a first offload processor module connected directly to a second offload processor module through their respective IO ports.