Offload Server Arithmetic Intensity Filtering for FPGA Loop Optimization
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Solution Overview
Problem
Existing methods for automatically offloading loop statements to FPGAs are inefficient, requiring extensive time for compilation and performance measurement, making it impractical for repetitive measurements across various patterns, especially when using Genetic Algorithms as in Non-Patent Literature 1.
Innovation Solution
An offload server that analyzes application code, identifies loop statements, generates offload processing patterns, calculates arithmetic intensity, narrows down high-intensity loop statements, and performs performance measurements to select the most efficient offload pattern for automatic compilation and deployment to an FPGA, reducing the number of necessary measurements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Extent of automation
If automatic parallelization is performed using compilers like Intel compiler, then parallel processing portions are extracted automatically, but performance is poor due to data exchange overhead between CPU memory and GPU memory
Solution Approach 1:
The patent changes the parameter of arithmetic intensity threshold to filter and select loop statements for offloading. By setting a threshold for arithmetic intensity, the system automatically identifies which loop statements are suitable for GPU offloading, thereby reducing unnecessary data exchange overhead while maintaining automation.
2Reliability
If skilled persons perform tuning in OpenCL or CUDA and search for appropriate parallel processing portions, then performance is improved, but the process is time-consuming and complex
Solution Approach 1:
The system performs self-service by automatically analyzing application source code, identifying loop statements, calculating arithmetic intensity, and generating offload processing patterns without requiring skilled persons. The offload server autonomously completes the entire process from code analysis to performance measurement and pattern selection.
Solution Approach 2:
The patent performs preliminary action by pre-calculating arithmetic intensity for loop statements before offloading. This preliminary analysis allows the system to identify suitable candidates for offloading in advance, avoiding time-consuming trial-and-error tuning during the actual performance optimization phase.
3Measurement precision
If repetitive performance measurements are performed for many patterns using Genetic Algorithms, then optimal offload patterns are found, but the process takes several hours to compile and deploy
Solution Approach 1:
The patent applies partial action by performing performance measurements only for a limited number of generated offload processing patterns rather than exhaustively measuring all possible patterns. This selective measurement approach reduces compilation and deployment time while still identifying optimal patterns through arithmetic intensity filtering.
Solution Approach 2:
The system performs preliminary action by pre-filtering loop statements based on arithmetic intensity threshold before generating offload processing patterns. This preliminary filtering reduces the number of patterns that require full compilation and performance measurement, thereby reducing overall time consumption.
4Reliability
If loop statements with high arithmetic intensity are selected for offloading, then processing performance is improved, but not all loop statements can be offloaded
Solution Approach 1:
The patent uses parameter changes by adjusting the arithmetic intensity threshold to control the balance between performance improvement and offloading coverage. By varying this threshold parameter, the system can adapt to different workloads and hardware configurations, selecting an optimal subset of loop statements for offloading.
Data Source
AI summary
An offload server includes: an application code analysis section configured to analyze source code of an application; a PLD processing designation section configured to identify loop statements of the application, generate a plurality of offload processing patterns designating, for each of the identified loop statements, parallel processing and/or pipeline processing on the PLD according to OpenCL, and perform compilation; an arithmetic intensity calculation section configured to calculate arithmetic intensities of the loop statements of the application; and a PLD processing pattern generation section configured to, on the basis of the arithmetic intensities calculated by the arithmetic intensity calculation section, narrow down the loop statements to, as candidates to be offloaded, those having an arithmetic intensity higher than a predetermined threshold.


