Offset-Bias Level Shifter for Low-Leakage Multi-Voltage Circuits
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Solution Overview
Problem
High-voltage electronic circuits face issues with high leakage currents and poor linearity in existing level shifters, particularly when shifting voltage levels between low and high voltage domains.
Innovation Solution
An electronic circuit with a voltage-offset circuit, push-pull circuit, bias circuit, high-voltage stand-off circuit, and pull-up circuit is designed to generate an offset-bias voltage, providing a stable output voltage difference that is insensitive to changes in process, voltage, and temperature, while minimizing quiescent current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If existing level shifters are used to shift voltage levels between low and high voltage domains, then voltage level shifting is achieved, but high leakage currents occur
Solution Approach 1:
The level shifter circuit employs dynamic control mechanisms where transistors are selectively activated or deactivated based on the input signal state. The circuit transitions between different operational modes (high-side and low-side switching) to minimize leakage paths, ensuring that leakage current is reduced while maintaining voltage level shifting capability across different operating conditions.
Solution Approach 2:
The invention changes the operational parameters of the transistors by adjusting their gate-source voltages and channel conductances dynamically. By modifying the electrical parameters of the switching elements based on input signal levels and load conditions, the circuit optimizes the trade-off between voltage shifting performance and leakage current reduction.
2Reliability
If existing level shifters are used to shift voltage levels, then voltage level shifting is achieved, but poor linearity occurs as the magnitude of input signal is varied
Solution Approach 1:
The level shifter incorporates feedback mechanisms where the output voltage is monitored and used to adjust the switching characteristics of the transistors. This feedback control ensures that the transfer characteristic maintains consistent linearity across the full range of input signal magnitudes, compensating for non-linear effects that occur during voltage level transitions.
Solution Approach 2:
The circuit dynamically adjusts its transfer characteristic by changing the operational state of the switching transistors in response to varying input signal magnitudes. This dynamic adaptation ensures that the relationship between input and output voltages remains linear across different signal levels, improving overall linearity performance.
3Reliability
If transistors in digital control circuits operate at low voltages, then transistor operation is reliable, but high-voltage electronic circuits cannot operate directly with these transistors
Solution Approach 1:
The level shifter circuit acts as an intermediary between low-voltage digital control circuits and high-voltage electronic circuits. It uses a series of switching transistors configured in a cascaded arrangement that can handle high voltage while being controlled by low voltage signals, thus bridging the voltage domain gap and enabling communication and control between different voltage levels.
Solution Approach 2:
The voltage level shifting function is segmented into multiple stages, each handled by individual transistors or transistor pairs operating at different voltage levels. This segmentation allows the control transistors to operate safely at low voltages while the power transistors handle high voltages, maintaining both reliability and voltage domain compatibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The circuit achieves stable voltage offset in the high voltage domain, reducing leakage currents and improving linearity, with low power consumption and ability to operate at high frequencies.
Implementation Method 1
a voltage-drop circuit (512) comprising a series arrangement of a set of M-1 diode-connected p-FETs (P1, P3) each having a gate-source voltage Vgs, connected between the high-voltage-supply terminal and a first node (528) of the push-pull circuit to provide a voltage (M-1).Vgs therebetween
Implementation Method 2
at least one, N, n-FET connected between the high-voltage-supply terminal and the bias output terminal and having a threshold voltage Vt, and arranged to provide a voltage difference Vgs + N.(Vt) between the first node and the offset-bias output terminal
Data Source
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AI summary
An electronic circuit is configured to switchably generate an offset-bias output at a offset-bias voltage (Vc) in response to at least an enable signal (EN) at a low voltage relative to the offset-bias voltage, and comprising: a reference input, a low-voltage-input, and high-voltage-supply terminals, and an offset-bias output terminal (526); a voltage-offset circuit (510) configured to generate the offset-bias voltage from the second voltage; a bias circuit (530) for providing a bias current; and a high-voltage stand-off circuit (550); wherein the voltage-offset circuit (510) comprises: a push-pull circuit; a voltage-drop circuit (512) comprising diode-connected p-FETs (P1, P3) connected to provide a voltage (M-1).Vgs; and a variable current source for stabilising the voltage offset; the push-pull circuit (520) comprises a further p-FET having a gate-source voltage Vgs and at least one, N, n-FET arranged to provide a voltage difference Vgs + N.(Vt) between the first node and the offset-bias output terminal.