Offset-Canceling MRAM Write Sensing Circuit
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Solution Overview
Problem
Magneto-resistive random access memory (MRAM) devices, specifically STT-MRAM, consume more power during write operations due to the higher current levels required to change the magnetic orientation of the free layer in magnetic tunnel junctions (MTJs), which is inefficient for low power memory applications despite lower write operation frequency compared to read operations.
Innovation Solution
The implementation of offset-canceling (OC) write operation sensing circuits that sense voltage changes across MTJs in MRAM bit cells to detect when switching is complete, allowing for early termination of write operations and reducing power consumption by using a voltage sensing circuit and sense amplifier with a capacitive-coupling effect, which can detect both logic '0' and '1' write operations with a single input, thereby minimizing transistor count and area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If higher current levels are applied to change the magnetic orientation of the free layer in MTJs during write operations, then the write operation reliability is improved, but the power consumption increases
Solution Approach 1:
The sensing circuit performs preliminary detection during the write operation to detect when MTJ switching is complete, allowing the write operation to be terminated early rather than continuing for a fixed duration, thus reducing unnecessary power consumption while ensuring reliable write completion
Solution Approach 2:
The sensing circuit provides real-time feedback on the MTJ switching status by detecting voltage changes across the MTJ, enabling the write operation to be dynamically adjusted and terminated as soon as switching is detected, optimizing the balance between write reliability and power consumption
2Loss of time
If voltage sensing circuits are implemented to detect MTJ switching completion, then the write operation time is reduced through early termination, but the device complexity increases
Solution Approach 1:
The sensing circuit uses the existing voltage across the MTJ during write operation as an intermediary signal to detect switching completion, rather than requiring separate dedicated sensing circuits, thus reducing overall device complexity while enabling early write termination
Solution Approach 2:
The same sensing circuit infrastructure is used for both read and write operations, allowing the circuit to detect voltage changes in different operational contexts without requiring separate dedicated circuits, thereby minimizing additional complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces dynamic power consumption and average write times by terminating write operations once MTJ switching is detected, optimizing energy usage in MRAM devices without increasing complexity or transistor count.
Implementation Method 1
the resistance of the MTJ will change since the resistance of the MTJ is a function of the magnetic orientation of the free layer in the MTJ
Implementation Method 2
using a voltage sensing circuit and sense amplifier with a capacitive-coupling effect
Data Source
AI summary
Aspects disclosed in the detailed description include offset-canceling (OC) write operation sensing circuits for sensing switching in a magneto-resistive random access memory (MRAM) bit cell in an MRAM for a write operation. The OC write operation sensing circuit is configured to sense when MTJ switching occurs in MRAM bit cell. In an example, the OC write operation sensing circuit includes a voltage sensing circuit and a sense amplifier. The voltage sensing circuit employs a capacitive-coupling effect so that the output voltage drops in response to MTJ switching for both logic ‘0’ and logic ‘1’ write operations. The sense amplifier has a single input and a single output node with an output voltage indicating when MTJ switching has occurred in the MRAM bit cell. A single input transistor and pull-up transistor are provided in the sense amplifier in one example to provide an offset-canceling effect.