Programmable Offset Cells for Compute-in-Memory Noise Reduction

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Solution Overview

Problem

Compute-in-memory (CIM) architectures face challenges in mitigating noise and inaccuracies introduced by conversions between digital-domain and analog-domain components, particularly in resource-limited devices like mobile and IoT devices, which are used in neural network inferencing applications.

Innovation Solution

The implementation of a CIM array with programmable offset cells and an analog-to-digital converter (ADC) that receives a programmable offset value, allowing for improved accuracy and reduced power consumption by minimizing noise during conversions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conversions between digital-domain and analog-domain components are performed in CIM architecture, then computational power is improved, but noise and inaccuracies are introduced

Engineering Contradiction:
Improvecomputational powerVSAvoidaccuracy
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The patent applies preliminary action by performing offset calibration before actual neural network computations. The system pre-determines offset values for each column of the CIM array that compensate for systematic errors in the analog-domain computations. This preliminary calibration step ensures that subsequent conversions between digital and analog domains produce more accurate results, reducing the noise and inaccuracies introduced by these conversions while maintaining the computational power benefits of CIM architecture.

Inventive Principle:
Principle #10Preliminary action

2Use of energy by moving object

If resource-limited devices use CIM architecture for neural network inferencing, then power consumption is reduced, but accuracy deteriorates due to conversion noise

Engineering Contradiction:
Improvepower consumptionVSAvoidinferencing accuracy
Core Design Contradiction:
Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the offset values for each column of the CIM array based on calibration measurements. The system modifies the reference parameters (offset values) to compensate for variations in analog-domain computations. This allows resource-limited devices to maintain higher inferencing accuracy while utilizing the low power consumption benefits of CIM architecture, as the adjusted offset parameters correct the accuracy deterioration caused by conversion noise.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11551759B2Voltage offset for compute-in-memory architecture
Publication Date: 2023.01.10 QUALCOMM INC
  • US11551759B2 patent drawing
  • US11551759B2 patent drawing
  • US11551759B2 patent drawing

AI summary

In one embodiment, an electronic device includes a compute-in-memory (CIM) array that includes a plurality of columns. Each column includes a plurality of CIM cells connected to a corresponding read bitline, a plurality of offset cells configured to provide a programmable offset value for the column, and an analog-to-digital converter (ADC) having the corresponding bitline as a first input and configured to receive the programmable offset value. Each CIM cell is configured to store a corresponding weight.