Multiple Output Offset Comparator for Buck Converter Threshold Control

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Solution Overview

Problem

In buck DC-to-DC converters, existing comparators face challenges in accurately controlling the gap between thresholds, leading to potential faults due to transistor mismatch, which can result in delayed corrective actions and inefficient operation, especially in applications like portable electronics where power management is critical.

Innovation Solution

A multiple output offset comparator circuit that uses a difference circuit, output mirror circuit, and offset generator to accurately compare input signals with multiple reference levels, ensuring precise control over the threshold gap by adjusting the offset signal levels, thereby minimizing the impact of transistor mismatch.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If separate comparators are used for sleep and panic functions, then each comparator can operate independently, but the gap between thresholds cannot be well controlled and transistor mismatch causes faults

Engineering Contradiction:
Improveindependent operation capabilityVSAvoidthreshold gap control
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent combines the sleep comparator and panic comparator into a single integrated comparator circuit that shares common transistors and threshold generation logic. This merging ensures that the threshold gap is determined by a single programmable offset value rather than by two separate transistor pairs, thereby eliminating mismatch errors and enabling precise control of the threshold gap while maintaining independent operational modes through control signals.

Inventive Principle:
Principle #5Merging (Combining)

2Ease of manufacture

If transistor mismatch is present, then manufacturing variability increases, but the threshold gap control deteriorates leading to delayed corrective actions

Engineering Contradiction:
Improvetransistor variability toleranceVSAvoidcorrective action timing
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces a programmable offset generator as an intermediary component that generates the panic threshold by adding a controlled offset to the sleep threshold. This offset generator acts as a mediator that decouples the threshold gap from transistor mismatch, allowing the gap to be precisely programmed through digital control words while the physical transistors can vary within normal manufacturing tolerances without affecting the threshold gap accuracy.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of operation

If multiple separate comparators are used, then each threshold can be independently set, but the circuit complexity increases and mismatch errors occur

Engineering Contradiction:
Improveindependent threshold settingVSAvoidcomparator circuit structure
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent designs a universal comparator circuit that can perform both sleep mode detection and panic mode detection functions using the same physical components. The single comparator is controlled by mode selection signals that enable or disable specific threshold comparisons, allowing one circuit structure to fulfill multiple functions that would otherwise require separate comparators, thereby reducing complexity while maintaining operational flexibility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP2933910B1A multiple output offset comparator
Publication Date: 2017.12.20 DIALOG SEMICONDUCTOR (UK) LTD
  • EP2933910B1 patent drawingFigure 1
  • EP2933910B1 patent drawingFigure 2
  • EP2933910B1 patent drawingFigure 3

AI summary

A multiple output comparator compares a first input signal and a second input signal. An output mirror circuit receives the comparison and sets an output signal at a first output terminal of the multiple output comparator to a digital state indicating that the magnitude of the first signal is greater than or lesser than the second signal. An offset generator creates an offset signal for adjusting a threshold signal level at the output mirror circuit such that the difference of the first signal and the second signal is combined with the offset signal. The output mirror circuit transfers provides a digital state to another output terminal indicating that the first signal is greater than or lesser than the second signal as adjusted by the adjustment signal.