Offset Compensation Circuit for Gamma Voltage Interpolation
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Solution Overview
Problem
Existing display panel interpolation schemes result in nonlinearity (INL) and offset issues due to operation mode and ambient temperature, affecting the accuracy of gamma voltage selection and display quality.
Innovation Solution
A semiconductor device with an offset compensation circuit that generates compensation values by interpolating low-order bit data, stored in a look-up table, to adjust gamma voltages based on temperature and operation mode, reducing INL and improving display accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If an amplifier interpolation scheme is used to reduce circuit area, then the decoder circuit area is reduced, but integral nonlinearity (INL) increases and offset errors occur due to operation mode and temperature changes
Solution Approach 1:
The patent pre-calculates and stores compensation values for different operation modes and temperature conditions in a look-up table before actual gamma voltage selection. This preliminary preparation allows the system to quickly retrieve and apply appropriate compensation values without real-time complex calculations, thereby maintaining high precision while using a compact circuit architecture.
Solution Approach 2:
The patent introduces compensation values that vary based on operation mode and temperature parameters. By dynamically selecting and applying different compensation values corresponding to different operating conditions, the system corrects for mode-dependent and temperature-dependent offset errors, thereby maintaining gamma voltage selection accuracy across varying conditions.
2Measurement precision
If the number of digital bits of image data is increased to support higher resolution, then display resolution is improved, but the decoder circuit area increases exponentially
Solution Approach 1:
The patent segments the gamma voltage selection process into two stages: first selecting representative gamma voltages based on high-order bits of image data, then interpolating intermediate gamma voltages using low-order bits. This segmentation allows the use of a compact decoder circuit that handles fewer discrete voltage levels while achieving fine resolution through interpolation, thus supporting high display resolution without exponential growth in circuit area.
Solution Approach 2:
The patent transitions from directly selecting gamma voltages based on all digital bits to a two-dimensional approach: selecting from a reduced set of representative voltages using high-order bits, then refining the selection through interpolation using low-order bits. This dimensional transformation enables high-resolution display with a compact decoder by adding an interpolation dimension rather than directly encoding all voltage levels.
3Area of stationary object
If representative gamma voltages are selected by high-order bits and intermediate voltages by low-order bits, then circuit area is reduced, but offset errors occur due to operation mode and ambient temperature
Solution Approach 1:
The patent pre-calculates compensation values for different operation modes and temperature conditions and stores them in a look-up table. This preliminary preparation enables the system to quickly retrieve mode-specific and temperature-specific compensation values without real-time complex calculations, ensuring reliable gamma voltage accuracy across varying operating conditions while maintaining a compact circuit architecture.
Solution Approach 2:
The patent introduces compensation values that are dynamically selected based on operation mode and temperature parameters. By varying the compensation values according to these environmental and operational parameters, the system corrects for mode-dependent and temperature-dependent offset errors, thereby maintaining reliable gamma voltage accuracy across different operating conditions.
Data Source
AI summary
A semiconductor device is provided. The semiconductor device includes: an offset compensation circuit configured to obtain first data including first low-order bit data, second low-order bit data and high-order bit data, select two compensation values from among a plurality of compensation values based on the first low-order bit data, identify a final compensation value by interpolating the two compensation values based on the second low-order bit data, and compensate the final compensation value to generate second data; and a source driver configured to interpolate and output two gamma voltages from among a plurality of gamma voltages based on the second data.