Offset Corner Bump Layout for IC Package Delamination Control

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Solution Overview

Problem

The concentration of stress at the corner regions of integrated circuits leads to delamination between the seed layer and the post-passivation layer, as well as between the seed layer and the conductive pads, affecting the reliability and performance of the integrated circuits during thermal processes.

Innovation Solution

The openings of the post-passivation layer in the corner regions are shifted towards the center of the integrated circuit, reducing stress concentration and alleviating delamination by ensuring uniform thickness and alignment of the post-passivation layer and conductive pads.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the openings of the post-passivation layer are aligned with the conductive pads, then the manufacturing precision is improved, but stress concentration occurs at the corner regions leading to delamination

Engineering Contradiction:
Improvealignment precisionVSAvoidstress resistance
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies asymmetry by differentiating the alignment between openings and conductive pads based on location: corner regions use offset alignment while non-corner regions use coaxial alignment. This asymmetric approach allows stress reduction at corners while maintaining manufacturing precision at non-corner regions.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent implements local quality by applying different alignment strategies to different regions of the integrated circuit. Corner regions receive offset alignment to reduce stress concentration, while non-corner regions maintain coaxial alignment for manufacturing precision. This localized differentiation resolves the contradiction between stress resistance and manufacturing precision.

Inventive Principle:
Principle #3Local quality

2Reliability

If the openings are offset from the conductive pads in corner regions, then stress concentration is reduced and delamination is alleviated, but the alignment precision between openings and pads decreases

Engineering Contradiction:
Improvestress resistanceVSAvoidalignment precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The asymmetric alignment design offsets openings from conductive pads specifically in corner regions while maintaining coaxial alignment in non-corner regions. This resolves the contradiction by sacrificing alignment precision only where necessary (corners) to achieve stress resistance, while preserving precision elsewhere.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

Different alignment qualities are applied locally: offset alignment in corner regions for stress resistance, and coaxial alignment in non-corner regions for manufacturing precision. This localized quality differentiation allows the system to achieve both stress resistance and overall manufacturing precision simultaneously.

Inventive Principle:
Principle #3Local quality

3Manufacturing precision

If the post-passivation layer is uniformly thick, then the manufacturing precision is improved, but stress concentration occurs at corner regions causing delamination

Engineering Contradiction:
Improvethickness uniformityVSAvoidstress resistance
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent creates asymmetric stress distribution by offsetting openings from conductive pads in corner regions. This asymmetric positioning prevents stress concentration at corners while allowing the post-passivation layer to maintain uniform thickness, resolving the contradiction between thickness uniformity and stress resistance.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS12431452B2Semiconductor package including corner bumps coaxially offset from the pads and non-corner bumps coaxially aligned with the pads
Publication Date: 2025.09.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12431452B2 patent drawing
  • US12431452B2 patent drawing
  • US12431452B2 patent drawing

AI summary

An integrated circuit has corner regions and non-corner regions between the corner regions and includes a semiconductor substrate, conductive pads, passivation layer, post-passivation layer, first conductive posts, and second conductive posts. The conductive pads are disposed over the semiconductor substrate. The passivation layer and the post-passivation layer are sequentially disposed over the conductive pads. The first conductive posts and the second conductive posts are disposed on the post-passivation layer and are electrically connected to the conductive pads. The first conductive posts are disposed in the corner regions and the second conductive posts are disposed in the non-corner regions. Each of the first conductive posts has a body portion and a protruding portion connected to the body portion. A central axis of the body portion of the first conductive post has an offset from a central axis of the protruding portion of the first conductive post.