Offset and Delay Cancellation Circuit for DC-DC Power Supply
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Solution Overview
Problem
Conventional constant on time switching DC-DC power supplies face challenges in maintaining the output voltage at its design value due to variations in output ripple, error comparator offset, response delay, and circuit parameters, making it difficult to adjust the offset adaptively across different conditions.
Innovation Solution
A control circuit and method that includes a feedback circuit, error comparator, and an offset and delay cancellation circuit to dynamically adjust the error comparator's offset by generating an offset adjust signal based on the feedback signal and a second reference voltage, ensuring the output voltage remains close to its design value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional fixed offset adjustment is used for the error comparator, then the circuit complexity remains low, but the output voltage cannot be maintained at its design value under varying conditions
Solution Approach 1:
The patent implements dynamic offset adjustment by introducing a delay cancellation circuit that continuously monitors the feedback signal and generates compensating offset signals. Unlike conventional fixed offset adjustment, this circuit dynamically adapts the offset value based on real-time operating conditions including input voltage, output voltage, load variations, and transient states, thereby maintaining output voltage accuracy without requiring manual recalibration or complex compensation networks
Solution Approach 2:
The patent employs feedback mechanisms where the delay cancellation circuit receives the feedback signal from the output stage and uses it to generate appropriate offset compensation. The circuit compares the feedback signal with reference voltages and adjusts the error comparator offset accordingly, creating a closed-loop system that automatically corrects for variations in operating conditions while keeping the overall circuit structure relatively simple
2Speed
If the error comparator offset is adjusted to compensate for response delay, then the response time improves, but the output voltage departs from the design value due to varying offset and delay with operating conditions
Solution Approach 1:
The patent changes the offset parameter dynamically rather than using a fixed value. The delay cancellation circuit monitors operating conditions and adjusts the offset parameter in real-time to compensate for variations in response delay caused by changes in input voltage, output voltage, load current, and transient states. This ensures both fast response and accurate output voltage regulation under all operating conditions
Solution Approach 2:
The patent introduces dynamic adaptation mechanisms that allow the offset to vary with operating conditions. The delay cancellation circuit continuously adjusts the offset based on real-time feedback, enabling the system to maintain optimal response speed while preventing output voltage departure that would occur with fixed offset adjustment
3Manufacturing precision
If conventional control circuits are used without dynamic offset adjustment, then the circuit structure remains simple, but excessive adjustments occur during sleep mode affecting output voltage stability
Solution Approach 1:
The patent implements dynamic control that adapts to different operating modes including sleep mode. The delay cancellation circuit detects when the system is in sleep mode and disables or adjusts the offset adjustment function accordingly, preventing excessive adjustments that would destabilize the output voltage. This dynamic mode detection and adaptation capability is achieved through additional control logic that adds minimal complexity while significantly improving voltage stability during transient states
Data Source
AI summary
A control circuit of a switching DC-DC power supply includes a feedback circuit detecting an output voltage of the power supply to generate a feedback signal, an error comparator detecting an error between the output voltage and a design value of the output voltage, a control logic circuit generating a control signal according to the error for regulating the output voltage, and an offset and delay cancellation circuit generating an offset adjust signal according to the feedback signal and a second reference voltage for adjusting an offset of the error comparator to pull the output voltage toward the design value.