Offset Doped Regions in Power Semiconductor Devices
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Solution Overview
Problem
High-voltage semiconductor devices face a trade-off between increasing breakdown voltage and ON-resistance, where enhancing breakdown voltage often results in increased device size and resistance in the ON state, reducing performance.
Innovation Solution
A semiconductor device design featuring a substrate with doped regions that are vertically and horizontally offset, allowing for optimized electric field distribution, which increases breakdown voltage while minimizing ON-resistance and device size by strategically placing doped regions based on electric field profiles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the doping concentration of the drift region is reduced to increase breakdown voltage, then the breakdown voltage is improved, but the ON-resistance increases
Solution Approach 1:
The patent introduces multiple doped regions with different doping concentrations distributed at different depths and horizontal positions within the drift region. This creates local variations in electrical properties, allowing high breakdown voltage in regions where doping is reduced while maintaining low ON-resistance in regions where doping is concentrated, thereby resolving the contradiction between breakdown voltage and ON-resistance
Solution Approach 2:
The drift region is segmented into multiple doped regions rather than using a uniform doping structure. Each doped region has specific depth and horizontal positioning, creating a segmented doping profile that optimizes both breakdown voltage and ON-resistance by distributing dopants strategically throughout the drift region
2Reliability
If the depth of the drift region is increased to increase breakdown voltage, then the breakdown voltage is improved, but the device size increases
Solution Approach 1:
The patent changes the doping concentration parameter at different depths and horizontal positions within the drift region. By creating multiple doped regions with varying doping levels, the patent achieves high breakdown voltage without requiring increased drift region depth, thus preventing device size enlargement while maintaining reliability
3Reliability
If the length of the isolation structure underlying the gate is increased to increase breakdown voltage, then the breakdown voltage is improved, but the device area increases
Solution Approach 1:
Instead of extending the isolation structure horizontally (which increases device area), the patent introduces vertical and horizontal offset doped regions within the drift region. This three-dimensional doping arrangement achieves enhanced breakdown voltage through vertical depth variations and horizontal positioning without increasing the overall device footprint
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively enhances the breakdown voltage of power semiconductor devices while reducing ON-resistance and overall device size, enabling more devices per unit area.
Implementation Method 1
implanting a first implant, through the mask layer, into the well region to form a plurality of first doped portions... implanting a second implant, through the mask layer, into the well region to form a plurality of second doped portions
Data Source
AI summary
A semiconductor device is provided. The device includes a substrate having a first conductivity type. The device further includes a drain region, a source region, and a well region disposed in the substrate. The well region is disposed between the drain region and the source region and having a second conductivity type opposite to the first conductivity type. The device further includes a plurality of doped regions disposed within the well region. The doped regions are vertically and horizontally offset from each other. Each of the doped regions includes a lower portion having the first conductivity type, and an upper portion stacked on the lower region and having the second conductivity type.


