Offset Internal Electrodes in Multilayer Ceramic Capacitors
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Solution Overview
Problem
Multilayer ceramic capacitors face issues with interlayer-delamination and cracks due to density differences between active and margin regions, leading to reduced reliability and insulation breakdown under high voltage, especially as dielectric layers are thinned and increased in number.
Innovation Solution
The capacitors feature first and second internal electrodes alternately exposed through both end surfaces of the ceramic body, offset from each other in the width direction, with an insulating layer on the side surfaces to reduce density differences and prevent interlayer-delamination, and external electrodes formed to connect with internal electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If dielectric layers are thinned and number is increased to achieve higher capacitance in smaller size, then capacitance density is improved, but density differences between active region and margin portion are increased causing interlayer-delamination and cracks
Solution Approach 1:
The patent applies asymmetry by offsetting internal electrodes from the center of the ceramic body toward one side, creating an asymmetric layout where margin portions are strategically positioned. This asymmetric arrangement balances the density distribution throughout the ceramic body, preventing the density differences that cause interlayer-delamination and cracks while maintaining high capacitance density through the increased number of thinned dielectric layers.
2Quantity of substance
If dielectric layers are thinned to increase capacitance, then capacitance density is improved, but insulation breakdown becomes more likely under high voltage conditions
Solution Approach 1:
The patent applies local quality by creating margin portions with specific material composition and thickness at strategic locations around the internal electrodes. These margin portions have different properties from the active dielectric layers, providing localized insulation enhancement and stress distribution that prevents breakdown at critical high-field regions while maintaining thin dielectric layers for high capacitance density.
Solution Approach 2:
The patent implements beforehand cushioning by incorporating margin portions that act as protective buffers before voltage stress can cause breakdown. These margin portions are designed in advance to distribute electric field stress and mechanical stress, preventing catastrophic failure of the thinned dielectric layers under high voltage conditions.
Data Source
AI summary
There is provided a multilayer ceramic electronic component, including: a ceramic body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes alternately exposed through both end surfaces of the ceramic body, having respective ones of the dielectric layers interposed therebetween, and being placed alternately to the left and to the right in a width direction of the ceramic body to be offset from one another, when the ceramic body is viewed in a width-thickness cross-sectional direction; and first and second external electrodes formed on the end surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively.